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* TargetInstrInfo: add virtual function getInstSizeInBytesSjoerd Meijer2016-07-291-1/+1
| | | | | | | | | This adds a target hook getInstSizeInBytes to TargetInstrInfo that a lot of subclasses already implement. Differential Revision: https://reviews.llvm.org/D22885 llvm-svn: 277126
* MachineFunction: Return reference for getFrameInfo(); NFCMatthias Braun2016-07-284-129/+128
| | | | | | | getFrameInfo() never returns nullptr so we should use a reference instead of a pointer. llvm-svn: 277017
* TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFCSjoerd Meijer2016-07-284-5/+5
| | | | | | Differential Revision: https://reviews.llvm.org/D22925 llvm-svn: 276997
* [PowerPC] Fix typo in PPCHazardRecognizers.cppNemanja Ivanovic2016-07-271-1/+1
| | | | | | Fixes PR28731. llvm-svn: 276865
* PowerPC: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-277-174/+170
| | | | | | | | | | | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr* in the PowerPC backend, mainly by preferring MachineInstr& over MachineInstr* when a pointer isn't nullable and using range-based for loops. There was one piece of questionable code in PPCInstrInfo::AnalyzeBranch, where a condition checked a pointer converted from an iterator for nullptr. Since this case is impossible (moreover, the code above guarantees that the iterator is valid), I removed the check when I changed the pointer to a reference. Despite that case, there should be no functionality change here. llvm-svn: 276864
* MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFCJoel Jones2016-07-252-2/+5
| | | | | | | | | | | | | | | Some targets, notably AArch64 for ILP32, have different relocation encodings based upon the ABI. This is an enabling change, so a future patch can use the ABIName from MCTargetOptions to chose which relocations to use. Tested using check-llvm. The corresponding change to clang is in: http://reviews.llvm.org/D16538 Patch by: Joel Jones Differential Revision: https://reviews.llvm.org/D16213 llvm-svn: 276654
* [PowerPC] Remove redundant direct moves when extracting integers and ↵Nemanja Ivanovic2016-07-181-0/+43
| | | | | | | | | | | | | | converting to FP This patch corresponds to review: https://reviews.llvm.org/D21354 We use direct moves for extracting integer elements from vectors. We also use direct moves when converting integers to FP. When these operations are chained, we get a direct move out of a VSR followed by a direct move back into a VSR. These are redundant - all we need to do is line up the element and convert. llvm-svn: 275796
* [PowerPC] Set kill flag for scratch register when spilling the link registerNemanja Ivanovic2016-07-151-1/+1
| | | | | | This fixes PR 28526. llvm-svn: 275603
* [SelectionDAG] Get rid of bool parameters in SelectionDAG::getLoad, ↵Justin Lebar2016-07-151-225/+171
| | | | | | | | | | | | | | | | | | | | | | | getStore, and friends. Summary: Instead, we take a single flags arg (a bitset). Also add a default 0 alignment, and change the order of arguments so the alignment comes before the flags. This greatly simplifies many callsites, and fixes a bug in AMDGPUISelLowering, wherein the order of the args to getLoad was inverted. It also greatly simplifies the process of adding another flag to getLoad. Reviewers: chandlerc, tstellarAMD Subscribers: jholewinski, arsenm, jyknight, dsanders, nemanjai, llvm-commits Differential Revision: http://reviews.llvm.org/D22249 llvm-svn: 275592
* Rename AnalyzeBranch* to analyzeBranch*.Jacques Pienaar2016-07-152-2/+3
| | | | | | | | | | | | Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect. Reviewers: tstellarAMD, mcrosier Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai Differential Revision: https://reviews.llvm.org/D22409 llvm-svn: 275564
* [Power9] Add codegen for VSX word insert/extract instructionsNemanja Ivanovic2016-07-125-8/+220
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D20239 It adds exploitation of XXINSERTW and XXEXTRACTUW instructions that are useful in some cases for inserting and extracting vector elements of v4[if]32 vectors. llvm-svn: 275215
* [PowerPC] Cannonicalize applicable vector shift immediates as swapsNemanja Ivanovic2016-07-123-3/+18
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D21358 Vector shifts that have the same semantics as a vector swap are cannonicalized as such to provide additional opportunities for swap removal optimization to remove unnecessary swaps. llvm-svn: 275168
* Fix branch relaxation in 16-bit mode.Nirav Dave2016-07-111-2/+2
| | | | | | | | | | | | | | | Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation to generate jumps with 16-bit sized immediates in 16-bit mode. This fixes PR22097. Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D20830 llvm-svn: 275068
* Use the class version of getPointerTy rather than getting back toEric Christopher2016-07-071-23/+22
| | | | | | ourselves via a call through the DAG. llvm-svn: 274721
* Use the class definition for useSoftFloat.Eric Christopher2016-07-071-4/+4
| | | | llvm-svn: 274720
* Rename argument for consistency.Eric Christopher2016-07-072-22/+22
| | | | llvm-svn: 274717
* Remove the plumbing for isDarwinABI from EmitTailCallLoadFPAndRetAddr.Eric Christopher2016-07-072-9/+6
| | | | llvm-svn: 274716
* Use the MachineFunction that we've already queried for in the function.Eric Christopher2016-07-071-4/+2
| | | | llvm-svn: 274715
* Remove the plumbing for isDarwinABI from the PrepareTailCall hierarchy.Eric Christopher2016-07-071-10/+8
| | | | llvm-svn: 274714
* Remove the plumbing of 64-bitness from PrepareTailCall and functionsEric Christopher2016-07-071-13/+13
| | | | | | called by it. llvm-svn: 274711
* Sink call to get the MachineFunction into EmitTailCallStoreFPAndRetAddrEric Christopher2016-07-071-10/+7
| | | | | | and remove the argument. llvm-svn: 274710
* Remove unnecessary subtarget parameters in PPCTargetLowering.Eric Christopher2016-07-072-31/+26
| | | | llvm-svn: 274709
* Ensure all uses of permute instructions feed vector storesKit Barton2016-07-061-0/+20
| | | | | | | | | | | | | | | There is a problem in VSXSwapRemoval where it is incorrectly removing permute instructions. In this case, the permute is feeding both a vector store and also a non-store instruction. In this case, the permute cannot be removed. The fix is to simply look at all the uses of the vector register defined by the permute and ensure that all the uses are vector store instructions. This problem was reported in PR 27735 (https://llvm.org/bugs/show_bug.cgi?id=27735). Test case based on the original problem reported. Phabricator Review: http://reviews.llvm.org/D21802 llvm-svn: 274645
* fix typo; NFCSanjay Patel2016-07-061-1/+1
| | | | llvm-svn: 274636
* [PowerPC] - Legalize vector types by widening instead of integer promotionNemanja Ivanovic2016-07-053-1/+100
| | | | | | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D20443 It changes the legalization strategy for illegal vector types from integer promotion to widening. This only applies for vectors with elements of width that is a multiple of a byte since we have hardware support for vectors with 1, 2, 3, 8 and 16 byte elements. Integer promotion for vectors is quite expensive on PPC due to the sequence of breaking apart the vector, extending the elements and reconstituting the vector. Two of these operations are expensive. This patch causes between minor and major improvements in performance on most benchmarks. There are very few benchmarks whose performance regresses. These regressions can be handled in a subsequent patch with a DAG combine (similar to how this patch handles int -> fp conversions of illegal vector types). llvm-svn: 274535
* Use arrays or initializer lists to feed ArrayRefs instead of SmallVector ↵Benjamin Kramer2016-07-021-4/+1
| | | | | | | | where possible. No functionality change intended. llvm-svn: 274431
* Target: Remove unused arguments from overrideSchedPolicy, NFCDuncan P. N. Exon Smith2016-07-012-4/+0
| | | | | | | | | | TargetSubtargetInfo::overrideSchedPolicy takes two MachineInstr* arguments (begin and end) that invite implicit conversions from MachineInstrBundleIterator. One option would be to change their type to an iterator, but since they don't seem to have been used since the API was added in 2010, I'm deleting the dead code. llvm-svn: 274304
* CodeGen: Use MachineInstr& in TargetLowering, NFCDuncan P. N. Exon Smith2016-06-302-172/+175
| | | | | | | | | | | | | This is a mechanical change to make TargetLowering API take MachineInstr& (instead of MachineInstr*), since the argument is expected to be a valid MachineInstr. In one case, changed a parameter from MachineInstr* to MachineBasicBlock::iterator, since it was used as an insertion point. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. llvm-svn: 274287
* Delete MCCodeGenInfo.Rafael Espindola2016-06-301-9/+3
| | | | | | | MC doesn't really care about CodeGen stuff, so this was just complicating target initialization. llvm-svn: 274258
* Delete unused includes. NFC.Rafael Espindola2016-06-302-2/+0
| | | | llvm-svn: 274225
* CodeGen: Use MachineInstr& in TargetInstrInfo, NFCDuncan P. N. Exon Smith2016-06-304-130/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly a mechanical change to make TargetInstrInfo API take MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator) when the argument is expected to be a valid MachineInstr. This is a general API improvement. Although it would be possible to do this one function at a time, that would demand a quadratic amount of churn since many of these functions call each other. Instead I've done everything as a block and just updated what was necessary. This is mostly mechanical fixes: adding and removing `*` and `&` operators. The only non-mechanical change is to split ARMBaseInstrInfo::getOperandLatencyImpl out from ARMBaseInstrInfo::getOperandLatency. Previously, the latter took a `MachineInstr*` which it updated to the instruction bundle leader; now, the latter calls the former either with the same `MachineInstr&` or the bundle leader. As a side effect, this removes a bunch of MachineInstr* to MachineBasicBlock::iterator implicit conversions, a necessary step toward fixing PR26753. Note: I updated WebAssembly, Lanai, and AVR (despite being off-by-default) since it turned out to be easy. I couldn't run tests for AVR since llc doesn't link with it turned on. llvm-svn: 274189
* Drop support for creating $stubs.Rafael Espindola2016-06-295-212/+16
| | | | | | They are created by ld64 since OS X 10.5. llvm-svn: 274130
* Use isPositionIndependent in a few more places.Rafael Espindola2016-06-281-3/+2
| | | | | | | | | I think this converts all the simple cases that really just care about the generated code being position independent or not. The remaining uses are a bit more complicated and are checking things like "is this a library or executable" or "can this symbol be preempted". llvm-svn: 274055
* Convert 2 more uses to shouldAssumeDSOLocal(). NFC.Rafael Espindola2016-06-282-4/+4
| | | | llvm-svn: 274009
* NFC. Fix popular typo in comment 'deferencing' --> 'dereferencing'.Nick Lewycky2016-06-281-6/+6
| | | | | | Bonus changes, * placement in X86ISelLowering and 'exerce' -> 'exercise' in test. llvm-svn: 273984
* Move shouldAssumeDSOLocal to Target.Rafael Espindola2016-06-272-4/+3
| | | | | | Should fix the shared library build. llvm-svn: 273958
* Refactor duplicated condition.Rafael Espindola2016-06-271-4/+3
| | | | llvm-svn: 273900
* Move isPositionIndependent up to AsmPrinter.Rafael Espindola2016-06-271-3/+3
| | | | | | Use it in ppc too. llvm-svn: 273877
* Use the isPositionIndependent predicate. NFC.Rafael Espindola2016-06-271-4/+2
| | | | llvm-svn: 273875
* Simplify getLabelAccessInfo.Rafael Espindola2016-06-271-24/+19
| | | | | | It now takes a IsPIC flag instead of computing and returning it. llvm-svn: 273871
* Use existing predicate. NFC.Rafael Espindola2016-06-241-5/+1
| | | | | | This doesn't handle ELF, but neither did the previous code. llvm-svn: 273677
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-14/+11
| | | | llvm-svn: 273674
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-11/+3
| | | | llvm-svn: 273673
* clang-format a region. NFC.Rafael Espindola2016-06-241-4/+4
| | | | llvm-svn: 273672
* Refactor to use shouldAssumeDSOLocal. NFC.Rafael Espindola2016-06-231-10/+14
| | | | llvm-svn: 273612
* Refactor duplicated code. NFC.Rafael Espindola2016-06-231-20/+17
| | | | llvm-svn: 273595
* Use C++ comments for large block comment.Eric Christopher2016-06-231-16/+17
| | | | llvm-svn: 273526
* Use shouldAssumeDSOLocal.Rafael Espindola2016-06-221-5/+5
| | | | | | With this it handle -fPIE. llvm-svn: 273499
* Extract a few variables to make 'if' smaller. NFC.Rafael Espindola2016-06-221-7/+8
| | | | llvm-svn: 273497
* [SDAG] Remove FixedArgs parameter from CallLoweringInfo::setCalleeKrzysztof Parzyszek2016-06-221-1/+1
| | | | | | | | | | | The setCallee function will set the number of fixed arguments based on the size of the argument list. The FixedArgs parameter was often explicitly set to 0, leading to a lack of consistent value for non- vararg functions. Differential Revision: http://reviews.llvm.org/D20376 llvm-svn: 273403
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