summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/PowerPC
Commit message (Collapse)AuthorAgeFilesLines
* Add trampoline support to PPC. GCC simply calls the "__trampoline_setup"Bill Wendling2008-09-172-7/+50
| | | | | | function with appropriate parameters. This allows us to support blocks on PPC. llvm-svn: 56267
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-8/+7
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-7/+8
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Remove isImm(), isReg(), and friends, in favor of Dan Gohman2008-09-132-6/+6
| | | | | | | | | isImmediate(), isRegister(), and friends, to avoid confusion about having two different names with the same meaning. I'm not attached to the longer names, and would be ok with changing to the shorter names if others prefer it. llvm-svn: 56189
* Define CallSDNode, an SDNode subclass for use with ISD::CALL.Dan Gohman2008-09-132-34/+31
| | | | | | | | | | | | | Currently it just holds the calling convention and flags for isVarArgs and isTailCall. And it has several utility methods, which eliminate magic 5+2*i and similar index computations in several places. CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle nodes that are not CSE'd gracefully. llvm-svn: 56183
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-125-69/+71
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* Succumb utterly to compatibility and implementDale Johannesen2008-09-111-4/+4
| | | | | | | __sync_fetch_and_nand as ANDC, even though that's not what nand means. llvm-svn: 56087
* Fix logic for not emitting no-dead-strip for someDale Johannesen2008-09-091-0/+1
| | | | | | | | | | objects in llvm.used (thanks Anton). Makes visible the magic 'l' prefix for symbols on Darwin which are to be passed through the assembler, then removed at linktime (previously all references to this had been hidden in the ObjC FE code, oh well). llvm-svn: 55973
* Fix constant pool loads, and remove broken versions of addConstantPoolReference.Owen Anderson2008-09-061-12/+0
| | | | llvm-svn: 55868
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-042-2/+2
| | | | llvm-svn: 55779
* Clean up uses of TargetLowering::getTargetMachine.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55769
* Add intrinsics for log, log2, log10, exp, exp2.Dale Johannesen2008-09-041-0/+15
| | | | | | No functional change (and no FE change to generate them). llvm-svn: 55753
* Fix some bugs in the code sequences for atomics.Dale Johannesen2008-09-021-10/+10
| | | | llvm-svn: 55643
* Change getBinaryCodeForInstr prototype. First operand MachineInstr& should ↵Evan Cheng2008-09-021-6/+7
| | | | | | be const. Make corresponding changes. llvm-svn: 55623
* fix a bunch of 80-col violationsGabor Greif2008-08-312-5/+10
| | | | llvm-svn: 55588
* Expand for ROTR with MVT::i64.Bill Wendling2008-08-311-0/+1
| | | | | | Dale, Could you please review this? llvm-svn: 55581
* Add ppc partial-word ATOMIC_CMP_SWAP.Dale Johannesen2008-08-301-4/+143
| | | | llvm-svn: 55554
* Add partial word version of ATOMIC_SWAP.Dale Johannesen2008-08-291-50/+29
| | | | llvm-svn: 55546
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-283-87/+87
| | | | | | Node to reflect semantics llvm-svn: 55504
* In lowering SELECT_CC, removed cases where we can't flip the true and false ↵Mon P Wang2008-08-281-8/+0
| | | | | | when the compare value has a NaN llvm-svn: 55499
* Implement partial-word binary atomics on ppc.Dale Johannesen2008-08-283-0/+219
| | | | llvm-svn: 55478
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-2/+2
| | | | llvm-svn: 55394
* Make TargetInstrInfo::copyRegToReg return a bool indicating whether the copy ↵Owen Anderson2008-08-262-6/+8
| | | | | | | | | requested was inserted or not. This allows bitcast in fast isel to properly handle the case where an appropriate reg-to-reg copy is not available. llvm-svn: 55375
* Implement 32 & 64 bit versions of PPC atomicDale Johannesen2008-08-254-48/+125
| | | | | | binary primitives. llvm-svn: 55343
* Remove PPC-specific lowering for atomics; theDale Johannesen2008-08-254-108/+12
| | | | | | | | generic stuff works fine. Mark rewritten cmp-and-swap as not using CR1. llvm-svn: 55336
* It's important for the cmp-and-swap to balanceDale Johannesen2008-08-251-13/+31
| | | | | | | loads and stores but it's even more important for it to store the right value.:( llvm-svn: 55319
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-5/+4
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Implement __sync_synchronize on ppc32. Patch by Gary Benson.Dale Johannesen2008-08-223-3/+23
| | | | llvm-svn: 55186
* Rewrite ppc code generated for __sync_{bool|val}_compare_and_swapDale Johannesen2008-08-223-13/+19
| | | | | | | so that lwarx and stwcx are always executed the same number of times. This is important for performance, I'm told. llvm-svn: 55163
* Simplify SelectRoot's interface, and factor out some common codeDan Gohman2008-08-211-1/+1
| | | | | | from all targets. llvm-svn: 55124
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-214-11/+14
| | | | llvm-svn: 55092
* Use correct name for PPC codegen libraryAnton Korobeynikov2008-08-171-1/+1
| | | | llvm-svn: 54888
* Factor out asmprinter out of ppcAnton Korobeynikov2008-08-175-8/+57
| | | | llvm-svn: 54887
* PPC/Linux normally uses named section for bssAnton Korobeynikov2008-08-161-0/+5
| | | | llvm-svn: 54847
* Use proper strings section name for PPCAnton Korobeynikov2008-08-161-1/+1
| | | | llvm-svn: 54846
* Convert uses of std::vector in TargetInstrInfo to SmallVector. This change ↵Owen Anderson2008-08-142-6/+7
| | | | | | had to be propoagated down into all the targets and up into all clients of this API. llvm-svn: 54802
* Implement ISD::TRAP support on PPCNate Begeman2008-08-114-2/+18
| | | | llvm-svn: 54644
* Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov2008-08-081-12/+4
| | | | llvm-svn: 54540
* Use chars, where possibleAnton Korobeynikov2008-08-081-30/+30
| | | | llvm-svn: 54539
* Convert PPC/Linux to new section printing stuffAnton Korobeynikov2008-08-083-89/+74
| | | | llvm-svn: 54538
* Switch PPC/Darwin to new section handling stuffAnton Korobeynikov2008-08-083-153/+107
| | | | llvm-svn: 54537
* CleanupAnton Korobeynikov2008-08-081-72/+70
| | | | llvm-svn: 54536
* Add a flag to disable jump table generation (allDale Johannesen2008-07-312-1/+5
| | | | | | | | switches use the binary search algorithm) for environments that don't support it. PPC64 JIT is such an environment; turn the flag on for that. llvm-svn: 54248
* Rename SDOperand to SDValue.Dan Gohman2008-07-275-536/+536
| | | | llvm-svn: 54128
* Tidy SDNode::use_iterator, and complete the transition to have itDan Gohman2008-07-271-6/+6
| | | | | | | parallel its analogue, Value::value_use_iterator. The operator* method now returns the user, rather than the use. llvm-svn: 54127
* Fix a catastrophic PPC64 ABI bug: i32 operands which are passed in memory ↵Evan Cheng2008-07-241-0/+1
| | | | | | (all of the parameter registers are used) are loaded from sp offsets that were off by 4. llvm-svn: 53979
* Add VerifyNode, a place to put sanity checks onDuncan Sands2008-07-211-3/+3
| | | | | | | | | | | | generic SDNode's (nodes with their own constructors should do sanity checking in the constructor). Add sanity checks for BUILD_VECTOR and fix all the places that were producing bogus BUILD_VECTORs, as found by "make check". My favorite is the BUILD_VECTOR with only two operands that was being used to build a vector with four elements! llvm-svn: 53850
* Unbreak build: 'DarwinTargetAsmInfo' was already taken as PPC TAI flavour.Anton Korobeynikov2008-07-193-12/+14
| | | | llvm-svn: 53801
* Make sure custom lowering for LegalizeTypesDuncan Sands2008-07-191-4/+10
| | | | | | | | | | returns a node with the right number of return values. This fixes codegen of Generic/cast-fp.ll, Generic/fp_to_int.ll and PowerPC/multiple-return-values.ll when using -march=ppc32 -mattr=+64bit. llvm-svn: 53794
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-172-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
OpenPOWER on IntegriCloud