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path: root/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
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* Target option DisableJumpTables is a gross hack. Move it to TargetLowering ↵Evan Cheng2012-07-021-6/+0
| | | | | | instead. llvm-svn: 159611
* Add all codegen passes to the PassManager via TargetPassConfig.Bob Wilson2012-07-021-3/+3
| | | | | | | | This is a preliminary step toward having TargetPassConfig be able to start and stop the compilation at specified passes for unit testing and debugging. No functionality change. llvm-svn: 159567
* Enable tail merging on PPC.Hal Finkel2012-06-091-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | Tail merging had been disabled on PPC because it would disturb bundling decisions made during pre-RA scheduling on the 970 cores. Now, however, all bundling decisions are made during post-RA scheduling, and tail merging is generally beneficial (the average test-suite speedup is insignificantly positive). Largest test-suite speedups: MultiSource/Benchmarks/mediabench/gsm/toast/toast - 30% MultiSource/Benchmarks/BitBench/uuencode/uuencode - 23% SingleSource/Benchmarks/Shootout-C++/ary - 21% SingleSource/Benchmarks/Stanford/Queens - 17% Largest slowdowns: MultiSource/Benchmarks/MiBench/security-sha/security-sha - 24% MultiSource/Benchmarks/McCat/03-testtrie/testtrie - 22% MultiSource/Applications/JM/ldecod/ldecod - 14% MultiSource/Benchmarks/mediabench/g721/g721encode/encode - 9% This is improved by using full (instead of just critical) anti-dependency breaking, but doing so still causes miscompiles and so cannot yet be enabled by default. llvm-svn: 158259
* Enable PPC CTR loop formation by default.Hal Finkel2012-06-081-5/+3
| | | | | | | | | | | | | | | | | | | | | | Thanks to Jakob's help, this now causes no new test suite failures! Over the entire test suite, this gives an average 1% speedup. The largest speedups are: SingleSource/Benchmarks/Misc/pi - 108% SingleSource/Benchmarks/CoyoteBench/lpbench - 54% MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail - 50% SingleSource/Benchmarks/Shootout/ary3 - 32% SingleSource/Benchmarks/Shootout-C++/matrix - 30% The largest slowdowns are: MultiSource/Benchmarks/mediabench/gsm/toast/toast - -30% MultiSource/Benchmarks/Prolangs-C/bison/mybison - -25% MultiSource/Benchmarks/BitBench/uuencode/uuencode - -22% MultiSource/Applications/d/make_dparser - -14% SingleSource/Benchmarks/Shootout-C++/ary - -13% In light of these slowdowns, additional profiling work is obviously needed! llvm-svn: 158223
* Disable the PPC CTR-Loops pass by default.Hal Finkel2012-06-081-4/+5
| | | | | | | | | | The pass itself works well, but the something in the Machine* infrastructure does not understand terminators which define registers. Without the ability to use the block-placement pass, etc. this causes performance regressions (and so is turned off by default). Turning off the analysis turns off the problems with the Machine* infrastructure. llvm-svn: 158206
* Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form ↵Hal Finkel2012-06-081-0/+14
| | | | | | | | | | CTR-based loop branching code. This pass is derived from the Hexagon HardwareLoops pass. The only significant enhancement over the Hexagon pass is that PPCCTRLoops will also attempt to delete the replaced add and compare operations if they are no longer otherwise used. Also, invalid preheader DebugLoc is not used. llvm-svn: 158204
* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-011-2/+2
| | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 llvm-svn: 155902
* The binutils for the IBM BG/P are too old to support CFI.Hal Finkel2012-04-021-0/+4
| | | | llvm-svn: 153886
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick2012-02-081-6/+7
| | | | llvm-svn: 150095
* TargetPassConfig: confine the MC configuration to TargetMachine.Andrew Trick2012-02-041-6/+4
| | | | | | | | | | Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. llvm-svn: 149754
* Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick2012-02-031-7/+31
| | | | | | | | | | | Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
* whitespaceAndrew Trick2012-02-031-6/+6
| | | | llvm-svn: 149671
* Unweaken vtables as per ↵David Blaikie2011-12-201-0/+3
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-4/+7
| | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. llvm-svn: 145714
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-10/+10
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
| | | | | | These are strictly utilities for registering targets and components. llvm-svn: 138450
* Refactor PPC target to separate MC routines from Target routines.Evan Cheng2011-07-251-26/+0
| | | | llvm-svn: 135942
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-8/+9
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-29/+13
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Rename createAsmInfo to createMCAsmInfo and move registration code to ↵Evan Cheng2011-07-141-13/+0
| | | | | | MCTargetDesc to prepare for next round of changes. llvm-svn: 135219
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-1/+1
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-3/+6
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* ADT/Triple: Move a variety of clients to using isOSDarwin() and isOSWindows()Daniel Dunbar2011-04-191-6/+4
| | | | | | predicates. llvm-svn: 129816
* Add support for the --noexecstack option.Rafael Espindola2011-01-231-1/+2
| | | | llvm-svn: 124077
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-1/+1
| | | | | | and fixes here and there. llvm-svn: 123170
* Wire up primitive support in the assembler backend for writing .o filesChris Lattner2010-11-151-0/+24
| | | | | | | | | | | | | | directly on the mac. This is very early, doesn't support relocations and has a terrible hack to avoid .machine from being printed, but despite that it generates an bitwise-identical-to-cctools .o file for stuff like this: define i32 @test() nounwind { ret i32 42 } I don't plan to continue pushing this forward, but if anyone else was interested in doing it, it should be really straight-forward. llvm-svn: 119136
* Implement a basic MCCodeEmitter for PPC. This doesn't handleChris Lattner2010-11-151-0/+4
| | | | | | | | | | | | | | | | fixups yet, and doesn't handle actually encoding operand values, but this is enough for llc -show-mc-encoding to show the base instruction encoding information, e.g.: mflr r0 ; encoding: [0x7c,0x08,0x02,0xa6] stw r0, 8(r1) ; encoding: [0x90,0x00,0x00,0x00] stwu r1, -64(r1) ; encoding: [0x94,0x00,0x00,0x00] Ltmp0: lhz r4, 4(r3) ; encoding: [0xa0,0x00,0x00,0x00] cmplwi cr0, r4, 8 ; encoding: [0x28,0x00,0x00,0x00] beq cr0, LBB0_2 ; encoding: [0x40,0x00,0x00,0x00] llvm-svn: 119116
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-1/+1
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-111-1/+2
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.Daniel Dunbar2010-03-201-1/+1
| | | | llvm-svn: 99097
* Preliminary patch to improve dwarf EH generation - Hooks to return ↵Anton Korobeynikov2010-02-151-29/+0
| | | | | | Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there llvm-svn: 96285
* remove dead code.Chris Lattner2010-02-021-54/+0
| | | | llvm-svn: 95141
* eliminate all the dead addSimpleCodeEmitter implementations.Chris Lattner2010-02-021-24/+0
| | | | | | | eliminate random "code emitter" stuff in Alpha, except for the JIT path. Next up, remove the template cruft. llvm-svn: 95131
* remove PPCMachOWriterInfo.Chris Lattner2010-02-021-1/+1
| | | | llvm-svn: 95111
* Even more explanation.Bill Wendling2010-01-191-0/+12
| | | | llvm-svn: 93841
* - Add getLSDAEncoding to the PowerPC backend.Bill Wendling2010-01-181-1/+16
| | | | | | - Greatly improve the comments to the getLSDAEncoding method. llvm-svn: 93796
* Pass StringRef by value.Daniel Dunbar2009-11-061-2/+1
| | | | llvm-svn: 86251
* rename COFFMCAsmInfo -> MCAsmInfoCOFF, likewise for darwin.Chris Lattner2009-08-221-1/+1
| | | | llvm-svn: 79773
* Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.Chris Lattner2009-08-221-6/+6
| | | | llvm-svn: 79763
* Revert 78892 and 78895, these break generating working executables onDaniel Dunbar2009-08-131-2/+3
| | | | | | | | | | | | | | | | | | | | | x86_64-apple-darwin10. --- Reverse-merging r78895 into '.': U test/CodeGen/PowerPC/2008-12-12-EH.ll U lib/Target/DarwinTargetAsmInfo.cpp --- Reverse-merging r78892 into '.': U include/llvm/Target/DarwinTargetAsmInfo.h U lib/Target/X86/X86TargetAsmInfo.cpp U lib/Target/X86/X86TargetAsmInfo.h U lib/Target/ARM/ARMTargetAsmInfo.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/ARMTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.cpp U lib/Target/PowerPC/PPCTargetAsmInfo.h U lib/Target/PowerPC/PPCTargetMachine.cpp G lib/Target/DarwinTargetAsmInfo.cpp llvm-svn: 78919
* fix a minor fixme. When building with SL and later tools, the ".eh" symbolsChris Lattner2009-08-131-3/+2
| | | | | | don't need to be exported from the .o files. llvm-svn: 78892
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-5/+13
| | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. llvm-svn: 78802
* second half of commit.Chris Lattner2009-08-111-2/+2
| | | | llvm-svn: 78744
* pass the TargetTriple down from each target ctor to theChris Lattner2009-08-111-4/+3
| | | | | | LLVMTargetMachine ctor. It is currently unused. llvm-svn: 78711
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-021-7/+6
| | | | | | - The C, C++, MSIL, and Mips backends still need the module. llvm-svn: 77927
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-1/+1
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* Add new helpers for registering targets.Daniel Dunbar2009-07-251-10/+6
| | | | | | - Less boilerplate == good. llvm-svn: 77052
* Put Target definitions inside Target specific header, and llvm namespace.Daniel Dunbar2009-07-181-2/+0
| | | | llvm-svn: 76344
* Kill off <TARGET>MachineModule variables, and <TARGETASMPRINTER>ForceLinkDaniel Dunbar2009-07-161-8/+0
| | | | | | | variables. - Module initialization functions supplanted the need for these. llvm-svn: 75886
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