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* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-47/+154
| | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-7/+13
| | | | | | Tested with "make check"! llvm-svn: 42346
* Fix comments.Evan Cheng2007-09-141-4/+4
| | | | llvm-svn: 41947
* Add missing index versions of instructions to the map.Bill Wendling2007-09-071-1/+7
| | | | llvm-svn: 41776
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-2/+2
| | | | | | | | | | | | | | | InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; llvm-svn: 40033
* Long live the exception handling!Anton Korobeynikov2007-07-141-2/+3
| | | | | | | | | | | | | | | This patch fills the last necessary bits to enable exceptions handling in LLVM. Currently only on x86-32/linux. In fact, this patch adds necessary intrinsics (and their lowering) which represent really weird target-specific gcc builtins used inside unwinder. After corresponding llvm-gcc patch will land (easy) exceptions should be more or less workable. However, exceptions handling support should not be thought as 'finished': I expect many small and not so small glitches everywhere. llvm-svn: 39855
* eliminateFrameIndex() change.Evan Cheng2007-05-011-1/+3
| | | | llvm-svn: 36626
* Match MachineFunction::UsedPhysRegs changes.Evan Cheng2007-04-251-7/+6
| | | | llvm-svn: 36452
* The PPC64 ELF ABI is "intended to use the same structure layout and calling ↵Nicolas Geoffray2007-04-031-66/+19
| | | | | | | | | convention rules as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/). Change all ELF tests to ELF32. llvm-svn: 35624
* Addition to the previous commit for getCalleeSavedRegClasses:Nicolas Geoffray2007-04-031-2/+4
| | | | | | | "The ELF ABI specifies F1-F8 registers as argument registers for double, not F1-F10. This affects only ELF, not MachO." llvm-svn: 35623
* The ELF ABI specifies F1-F8 registers as argument registers for double, notNicolas Geoffray2007-04-031-3/+5
| | | | | | F1-F10. This affects only ELF, not MachO. llvm-svn: 35622
* Protect R31's frame offset from being used by callee-saved registers, when R31Nicolas Geoffray2007-03-211-0/+20
| | | | | | is the frame pointer. llvm-svn: 35233
* Added MRegisterInfo hook to re-materialize an instruction.Evan Cheng2007-03-201-0/+9
| | | | llvm-svn: 35205
* Minor interface change.Evan Cheng2007-03-061-1/+2
| | | | llvm-svn: 34967
* PEI now passes a RegScavenger ptr to eliminateFrameIndex.Evan Cheng2007-02-281-2/+2
| | | | llvm-svn: 34707
* Duplicate use of LR, take 2.Jim Laskey2007-02-271-26/+34
| | | | llvm-svn: 34666
* Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrappingEvan Cheng2007-02-271-11/+2
| | | | | | | | | to infinite loop: PPCMachineFunctionInfo.h updated: 1.2 -> 1.3 PPCRegisterInfo.cpp updated: 1.110 -> 1.111 PPCRegisterInfo.h updated: 1.28 -> 1.29 llvm-svn: 34652
* implement support for the linux/ppc function call ABI. Patch byChris Lattner2007-02-251-11/+116
| | | | | | Nicolas Geoffray! llvm-svn: 34574
* Don't spill LR as a callee saved register.Jim Laskey2007-02-231-2/+11
| | | | llvm-svn: 34533
* By default, spills kills the register being stored.Evan Cheng2007-02-231-15/+15
| | | | llvm-svn: 34515
* Support to provide exception and selector registers.Jim Laskey2007-02-211-1/+8
| | | | llvm-svn: 34482
* Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.Evan Cheng2007-02-191-9/+30
| | | | llvm-svn: 34428
* For PR1207:Reid Spencer2007-02-191-30/+9
| | | | | | | Revert patches that caused the problem. Evan, please investigate and reapply when you've discovered the problem. llvm-svn: 34399
* Added getReservedRegs().Evan Cheng2007-02-171-9/+30
| | | | llvm-svn: 34376
* Support for non-landing pad exception handling.Jim Laskey2007-02-011-0/+4
| | | | llvm-svn: 33755
* Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.llChris Lattner2007-02-011-0/+3
| | | | llvm-svn: 33732
* Only gather frame info if debug or eh.Jim Laskey2007-01-291-2/+2
| | | | llvm-svn: 33639
* Landing pad-less eh for PPC.Jim Laskey2007-01-291-4/+3
| | | | llvm-svn: 33622
* Change the MachineDebugInfo to MachineModuleInfo to better reflect usageJim Laskey2007-01-261-8/+8
| | | | | | for debugging and exception handling. llvm-svn: 33550
* Make LABEL a builtin opcode.Jim Laskey2007-01-261-2/+2
| | | | llvm-svn: 33537
* Fix comment.Evan Cheng2007-01-251-2/+1
| | | | llvm-svn: 33508
* - Tell PEI that PPC will handle stack frame rounding itself.Evan Cheng2007-01-251-7/+2
| | | | | | | - Do not round up to max. alignment of stack object if it is > stack alignment. It will have to be handled with dynamic aligning code. llvm-svn: 33505
* Repair debug frames as a prelude to eh_frames. Switched to using MachineMovesJim Laskey2007-01-241-15/+43
| | | | | | by value so that clean up is less confusing (these vectors tend to be small.) llvm-svn: 33488
* hasFP() is now a virtual method of MRegisterInfo.Evan Cheng2007-01-231-1/+1
| | | | llvm-svn: 33455
* Fix naming inconsistency.Evan Cheng2007-01-021-10/+10
| | | | llvm-svn: 32823
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-3/+2
| | | | llvm-svn: 32333
* fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64Chris Lattner2006-12-071-0/+1
| | | | llvm-svn: 32331
* Make it easier for gdb to find the return address.Jim Laskey2006-12-061-45/+89
| | | | llvm-svn: 32277
* MachineInstr::setOpcode -> MachineInstr::setInstrDescriptorEvan Cheng2006-11-301-1/+1
| | | | llvm-svn: 32034
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-271-84/+95
| | | | | | of opcode and number of operands. llvm-svn: 31947
* r13 is the thread pointer on darwin/ppc64, don't allocate it.Chris Lattner2006-11-201-2/+2
| | | | llvm-svn: 31882
* Assert unhandled case.Jim Laskey2006-11-171-0/+2
| | | | llvm-svn: 31828
* 1. Ignore the -disable-fp-elim when the routine is a leaf.Jim Laskey2006-11-171-2/+2
| | | | | | 2. Offsets on 64-bit stores are still in bytes. llvm-svn: 31824
* This is a general clean up of the PowerPC ABI. Address several problems andJim Laskey2006-11-161-132/+244
| | | | | | | | | bugs including making sure that the TOS links back to the previous frame, that the maximum call frame size is not included twice when using frame pointers, no longer growing the frame on calls, double storing of SP and a cleaner/faster dynamic alloca. llvm-svn: 31792
* Fix ppc64 epilog bug.Chris Lattner2006-11-151-1/+1
| | | | llvm-svn: 31771
* Properly transfer kill / dead info.Evan Cheng2006-11-151-13/+17
| | | | llvm-svn: 31765
* Fix the PPC regressions last nightChris Lattner2006-11-151-6/+6
| | | | llvm-svn: 31752
* Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 callsChris Lattner2006-11-141-31/+51
| | | | | | | | clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity, instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when the code is actually located above the 4G boundary. llvm-svn: 31734
* Matches MachineInstr changes.Evan Cheng2006-11-131-10/+11
| | | | llvm-svn: 31712
* Make sure stack link is set in 64-bit.Jim Laskey2006-11-111-3/+9
| | | | llvm-svn: 31690
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