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path: root/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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* Enable early if conversion on PPCHal Finkel2013-04-051-0/+99
* Resynchronize isLoadFromStackSlot with LoadRegFromStackSlot (and stores) in P...Hal Finkel2013-03-271-0/+18
* Remove more dead LR-as-GPR PPC codeHal Finkel2013-03-271-16/+4
* Don't spill PPC VRSAVE on non-Darwin (even in SjLj)Hal Finkel2013-03-271-0/+4
* Note in PPCFunctionInfo VRSAVE spillsHal Finkel2013-03-231-10/+18
* Remove dead PPC LR spilling codeHal Finkel2013-03-231-30/+8
* Remove ABI-duplicated call instruction patterns.Ulrich Weigand2013-03-221-2/+2
* Fix a register-class comparison bug in PPCCTRLoopsHal Finkel2013-03-211-9/+0
* Add support for spilling VRSAVE on PPCHal Finkel2013-03-211-0/+12
* Prepare to make r0 an allocatable register on PPCHal Finkel2013-03-191-0/+9
* Improve PPC VR (Altivec) register spillingHal Finkel2013-03-171-34/+29
* Allocate the RS spill slot for any PPC function with spills and a large stack...Hal Finkel2013-03-151-3/+4
* PPC should always use the register scavenger for CR spillingHal Finkel2013-03-121-77/+9
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
* Remove all references to TargetInstrInfoImpl.Jakob Stoklund Olesen2012-11-281-2/+2
* When generating spill and reload code for vector registers on PowerPC,Bill Schmidt2012-10-101-6/+12
* Add PPC Freescale e500mc and e5500 subtargets.Hal Finkel2012-08-281-2/+4
* Implement PPCInstrInfo::isCoalescableExtInstr().Jakob Stoklund Olesen2012-06-191-0/+16
* Enable PPC CTR loop formation by default.Hal Finkel2012-06-081-6/+6
* Disable the PPC CTR-Loops pass by default.Hal Finkel2012-06-081-0/+12
* Add the PPCCTRLoops pass: a PPC machine-code-level optimization pass to form ...Hal Finkel2012-06-081-6/+71
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-201-16/+16
* Add instruction itinerary for the PPC64 A2 core.Hal Finkel2012-04-011-3/+4
* Fix dynamic linking on PPC64.Hal Finkel2012-03-311-1/+4
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430,...Jia Liu2012-02-181-1/+1
* make CR spill and restore 64-bit clean (no functional change), and fix some o...Hal Finkel2011-12-071-5/+11
* 64-bit LR8 load should use X11 not R11Hal Finkel2011-12-071-3/+3
* add RESTORE_CR and support CR unspillsHal Finkel2011-12-061-23/+36
* enable PPC register scavenging by default (update tests and remove some FIXMEs)Hal Finkel2011-12-051-5/+5
* update PPC 940 hazard rec. to function in postRA modeHal Finkel2011-12-021-12/+19
* add basic PPC register-pressure feedback; adjust the vaarg test to match the ...Hal Finkel2011-11-221-5/+2
* Make use of MachinePointerInfo::getFixedStack. This removes all mentionJay Foad2011-11-151-5/+2
* PPCInstrInfo.cpp: Fix one "unused" warning.NAKAMURA Takumi2011-11-081-0/+1
* Fix unused variable warning.Richard Smith2011-10-211-1/+1
* Disable the PPC hazard recognizer. It currently only supportsDan Gohman2011-10-201-2/+8
* Add PPC 440 scheduler and some associated testsHal Finkel2011-10-171-1/+9
* Teach PPCInstrInfo to handle sub-classes.Jakob Stoklund Olesen2011-10-041-14/+14
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-241-1/+1
* Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to MCTargetAsm...Evan Cheng2011-07-261-1/+1
* Refactor PPC target to separate MC routines from Target routines.Evan Cheng2011-07-251-2/+2
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-12/+0
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-111-2/+15
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-2/+2
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+3
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-281-1/+3
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-281-5/+5
* Various bits of framework needed for precise machine-level selectionAndrew Trick2010-12-241-0/+13
* whitespaceAndrew Trick2010-12-241-29/+29
* convert targets to the new MF.getMachineMemOperand interface.Chris Lattner2010-09-211-4/+6
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-61/+0
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