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path: root/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
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* Fix arguments for some Altivec instructions. From SWB.Dale Johannesen2007-08-091-9/+15
| | | | llvm-svn: 40957
* Fix spelling of mtvscr and mfvscr.Dale Johannesen2007-08-071-2/+2
| | | | llvm-svn: 40908
* Vector fneg must be expanded into fsub -0.0, X.Evan Cheng2007-07-301-2/+6
| | | | llvm-svn: 40586
* No more noResults.Evan Cheng2007-07-211-3/+1
| | | | llvm-svn: 40132
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-58/+58
| | | | | | | | | | | | | | | InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; llvm-svn: 40033
* fix incorrect encoding of vminsw.Chris Lattner2007-02-161-1/+1
| | | | llvm-svn: 34351
* Make the implicit def instructions look like other instrs.Chris Lattner2006-07-181-1/+1
| | | | llvm-svn: 29174
* Remove some now-unneeded casts from instruction patterns. With the castsChris Lattner2006-06-201-11/+11
| | | | | | removed, tblgen produces identical output to with them in. llvm-svn: 28867
* Fix the CodeGen/PowerPC/buildvec_canonicalize.ll regression last night.Chris Lattner2006-04-201-1/+1
| | | | llvm-svn: 27908
* Make sure that the new instructions selected have the right type. This fixesChris Lattner2006-04-201-5/+5
| | | | | | CodeGen/PowerPC/2006-04-19-vmaddfp-crash.ll llvm-svn: 27868
* Implement a TODO: have the legalizer canonicalize a bunch of operations toChris Lattner2006-04-161-41/+6
| | | | | | | one type (v4i32) so that we don't have to write patterns for each type, and so that more CSE opportunities are exposed. llvm-svn: 27731
* Add patterns for matching vnots with bit converted inputs. Most of these willChris Lattner2006-04-151-0/+17
| | | | | | go away when I start using evan's binop type canonicalizer llvm-svn: 27725
* Rename get_VSPLI_elt -> get_VSPLTI_eltChris Lattner2006-04-121-23/+10
| | | | | | | | | Canonicalize BUILD_VECTOR's that match VSPLTI's into a single type for each form, eliminating a bunch of Pat patterns in the .td file and allowing us to CSE stuff more aggressively. This implements PowerPC/buildvec_canonicalize.ll:VSPLTI llvm-svn: 27614
* Ensure that zero vectors are always v4i32, which forces them to CSE withChris Lattner2006-04-121-5/+2
| | | | | | each other. This implements CodeGen/PowerPC/vxor-canonicalize.ll llvm-svn: 27609
* Change the interface to the predicate that determines if vsplti* can be used.Chris Lattner2006-04-081-12/+6
| | | | | | No functionality changes. llvm-svn: 27536
* Match vpku[hw]um(x,x).Chris Lattner2006-04-061-14/+25
| | | | | | Convert vsldoi(x,x) to work the same way other (x,x) cases work. llvm-svn: 27467
* Add support for matching vmrg(x,x) patternsChris Lattner2006-04-061-6/+40
| | | | llvm-svn: 27463
* Pattern match vmrg* instructions, which are now lowered by the CFE into ↵Chris Lattner2006-04-061-6/+44
| | | | | | shuffles. llvm-svn: 27457
* Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. toChris Lattner2006-04-061-3/+27
| | | | | | | lower it and LLVM to have one fewer intrinsic. This implements CodeGen/PowerPC/vec_shuffle.ll llvm-svn: 27450
* Compile the vpkuhum/vpkuwum intrinsics into vpkuhum/vpkuwum instead of intoChris Lattner2006-04-061-2/+13
| | | | | | vperm with a perm mask lvx'd from the constant pool. llvm-svn: 27448
* Add all of the data stream intrinsics and instructions. wooChris Lattner2006-04-051-0/+21
| | | | llvm-svn: 27442
* Fix a typoChris Lattner2006-04-051-1/+1
| | | | llvm-svn: 27440
* add vslChris Lattner2006-04-051-0/+2
| | | | llvm-svn: 27425
* add vmladduhmChris Lattner2006-04-051-0/+2
| | | | llvm-svn: 27423
* Add m[tf]vscr instructions.Chris Lattner2006-04-051-0/+7
| | | | llvm-svn: 27421
* Add missing byte merges.Chris Lattner2006-04-041-0/+2
| | | | llvm-svn: 27418
* Add FP -> Int ConversionsChris Lattner2006-04-041-2/+4
| | | | llvm-svn: 27417
* add average intrinsicsChris Lattner2006-04-041-0/+7
| | | | llvm-svn: 27416
* Ask legalize to promote all vector shuffles to be v16i8 instead of having toChris Lattner2006-04-041-27/+28
| | | | | | | | handle all 4 PPC vector types. This simplifies the matching code and allows us to eliminate a bunch of patterns. This also adds cases we were missing, such as CodeGen/PowerPC/vec_splat.ll:splat_h. llvm-svn: 27400
* Plug in the byte and short splatsChris Lattner2006-04-041-2/+4
| | | | llvm-svn: 27387
* Add the full set of min/max instructionsChris Lattner2006-04-031-6/+14
| | | | llvm-svn: 27372
* Implement vnot using VNOR instead of using 'vspltisb v0, -1' and vxorChris Lattner2006-04-011-0/+4
| | | | llvm-svn: 27331
* Shrinkify some more intrinsic definitions.Chris Lattner2006-03-311-52/+17
| | | | llvm-svn: 27322
* Pull operand asm string into base class, shrinkifying intrinsic definitions.Chris Lattner2006-03-311-77/+58
| | | | | | No functionality change. llvm-svn: 27320
* Fix 80 column violations :)Chris Lattner2006-03-311-14/+13
| | | | llvm-svn: 27315
* fix a pastoChris Lattner2006-03-311-1/+1
| | | | llvm-svn: 27308
* Add vperm support for all datatypesChris Lattner2006-03-311-19/+13
| | | | llvm-svn: 27307
* compactify some more instruction definitionsChris Lattner2006-03-311-61/+15
| | | | llvm-svn: 27288
* Compactify comparisons.Chris Lattner2006-03-311-104/+34
| | | | llvm-svn: 27287
* Lower vector compares to VCMP nodes, just like we lower vector comparisonChris Lattner2006-03-311-26/+25
| | | | | | predicates to VCMPo nodes. llvm-svn: 27285
* Add the rest of the vmul instructions and the vmulsum* instructions.Chris Lattner2006-03-301-1/+15
| | | | llvm-svn: 27268
* Use a new tblgen feature to significantly shrinkify instruction definitions thatChris Lattner2006-03-301-108/+46
| | | | | | directly correspond to intrinsics. llvm-svn: 27266
* Add a bunch of new instructions for intrinsics.Chris Lattner2006-03-301-6/+87
| | | | llvm-svn: 27265
* Fix a couple typosNate Begeman2006-03-281-2/+2
| | | | llvm-svn: 27216
* Add a few more altivec intrinsicsNate Begeman2006-03-281-2/+26
| | | | llvm-svn: 27215
* implement a bunch more intrinsics.Chris Lattner2006-03-281-13/+107
| | | | llvm-svn: 27209
* Use normal lvx for scalar_to_vector instead of lve*x. They do the exactChris Lattner2006-03-281-7/+3
| | | | | | same thing and we have a dag node for the former. llvm-svn: 27205
* Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum ↵Chris Lattner2006-03-281-9/+9
| | | | | | value. Split them into separate enums. llvm-svn: 27201
* Fix the JIT encoding of VSELChris Lattner2006-03-271-4/+4
| | | | llvm-svn: 27160
* Fix the JIT encoding of VSPLTI*Chris Lattner2006-03-271-9/+9
| | | | llvm-svn: 27159
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