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path: root/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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* Implement builtin_return_address(x) and builtin_frame_address(x) Dale Johannesen2010-05-031-23/+34
| | | | | | on PPC for x!=0. 7624113. llvm-svn: 102972
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-011-6/+2
| | | | | | changes before doing phi lowering for switches. llvm-svn: 102809
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* Add more const qualifiers on TargetMachine and friends.Dan Gohman2010-04-211-2/+2
| | | | llvm-svn: 101977
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-37/+45
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-171-30/+31
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Eliminate an unnecessary SelectionDAG dependency in getOptimalMemOpType.Dan Gohman2010-04-161-3/+3
| | | | llvm-svn: 101531
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-4/+4
| | | | llvm-svn: 101334
* Avoid using f64 to lower memcpy from constant string. It's cheaper to use ↵Evan Cheng2010-04-081-2/+5
| | | | | | i32 store of immediates. llvm-svn: 100751
* Reapply address space patch after fixing an issue in MemCopyOptimizer.Mon P Wang2010-04-041-1/+1
| | | | | | | Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) llvm-svn: 100304
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-4/+4
| | | | llvm-svn: 100214
* Correctly lower memset / memcpy of undef. It should be a nop. PR6767.Evan Cheng2010-04-021-7/+10
| | | | llvm-svn: 100208
* Revert r100191 since it breaks objc in clang Mon P Wang2010-04-021-1/+1
| | | | llvm-svn: 100199
* Reapply address space patch after fixing an issue in MemCopyOptimizer.Mon P Wang2010-04-021-1/+1
| | | | | | | Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) llvm-svn: 100191
* Add comments about DstAlign and SrcAlign.Evan Cheng2010-04-011-0/+7
| | | | llvm-svn: 100132
* - Avoid using floating point stores to implement memset unless the value is ↵Evan Cheng2010-04-011-0/+1
| | | | | | | | zero. - Do not try to infer GV alignment unless its type is sized. It's not possible to infer alignment if it has opaque type. llvm-svn: 100118
* Fix sdisel memcpy, memset, memmove lowering:Evan Cheng2010-04-011-2/+2
| | | | | | | | | | | | | 1. Makes it possible to lower with floating point loads and stores. 2. Avoid unaligned loads / stores unless it's fast. 3. Fix some memcpy lowering logic bug related to when to optimize a load from constant string into a constant. 4. Adjust x86 memcpy lowering threshold to make it more sane. 5. Fix x86 target hook so it uses vector and floating point memory ops more effectively. rdar://7774704 llvm-svn: 100090
* Revert Mon Ping's change 99928, since it broke all the llvm-gcc buildbots.Bob Wilson2010-03-301-1/+1
| | | | llvm-svn: 99948
* Added support for address spaces and added a isVolatile field to memcpy, ↵Mon P Wang2010-03-301-1/+1
| | | | | | | | | memmove, and memset, e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) A update of langref will occur in a subsequent checkin. llvm-svn: 99928
* Now that the default for Darwin platforms is to place the LSDA into the TEXTBill Wendling2010-03-151-2/+1
| | | | | | section, remove the target-specific code that performs this. llvm-svn: 98580
* tidy indentationChris Lattner2010-03-141-3/+3
| | | | llvm-svn: 98523
* The same situation that effected ARM effects PPC with regards to placing theBill Wendling2010-03-121-3/+4
| | | | | | | | | LSDA into the TEXT section. We need to generate non-lazy pointers to it on Mach-O. However, the object the NLP points to may be local to the translation unit. If so, then the NLP needs to have the value of that object specified instead of "0", which the linker interprets as "external". llvm-svn: 98325
* The address of an indirect call must be in R12 on Darwin.Dale Johannesen2010-03-091-0/+10
| | | | | | | | Make it so. (This patch is in LowerCall_Darwin, which seems to be used by SVR4 code as well; since that doesn't belong here, I haven't worried about this case.) llvm-svn: 98077
* Remove dead parameter passing.Bill Wendling2010-03-021-1/+1
| | | | llvm-svn: 97536
* Move TLOF implementations to libCodegen to resolve layering violation.Anton Korobeynikov2010-02-151-1/+1
| | | | llvm-svn: 96288
* Remove an assumption of default arguments. This is in anticipation of aDavid Greene2010-02-151-41/+79
| | | | | | change to SelectionDAG build APIs. llvm-svn: 96236
* Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflectDan Gohman2010-02-081-7/+7
| | | | | | its current purpose. llvm-svn: 95564
* Revert 95130.Evan Cheng2010-02-021-1/+1
| | | | llvm-svn: 95160
* Pass callsite return type to TargetLowering::LowerCall and use that to check ↵Evan Cheng2010-02-021-1/+1
| | | | | | sibcall eligibility. llvm-svn: 95130
* PPC is not ready for sibcall optimization.Evan Cheng2010-01-291-0/+3
| | | | llvm-svn: 94853
* Eliminate target hook IsEligibleForTailCallOptimization.Evan Cheng2010-01-271-5/+5
| | | | | | | | | Target independent isel should always pass along the "tail call" property. Change target hook LowerCall's parameter "isTailCall" into a refernce. If the target decides it's impossible to honor the tail call request, it should set isTailCall to false to make target independent isel happy. llvm-svn: 94626
* Add more plumbing. This time in the LowerArguments and "get" functions whichBill Wendling2009-12-221-1/+1
| | | | | | | | return partial registers. This affected the back-end lowering code some. Also patch up some places I missed before in the "get" functions. llvm-svn: 91880
* Add support for calls through function pointers in the 64-bit PowerPC SVR4 ABI.Tilmann Scheller2009-12-181-3/+105
| | | | | | Patch contributed by Ken Werner of IBM! llvm-svn: 91680
* Make capitalization of names starting "is" more consistent.Dale Johannesen2009-11-241-10/+10
| | | | | | No functional change. llvm-svn: 89724
* Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are no longer used.Dan Gohman2009-11-231-3/+0
| | | | | | | | Note that "hasDotLocAndDotFile"-style debug info was already broken; people wanting this functionality should implement it in the AsmPrinter/DwarfWriter code. llvm-svn: 89711
* We are not using DBG_STOPPOINT anymore.Devang Patel2009-11-211-1/+0
| | | | llvm-svn: 89536
* Target-independent support for TargetFlags on BlockAddress operands,Dan Gohman2009-11-201-1/+1
| | | | | | and support for blockaddresses in x86-32 PIC mode. llvm-svn: 89506
* Adjust isConstantSplat to allow for big-endian targets.Dale Johannesen2009-11-131-2/+2
| | | | | | PPC is such a target; make it work. llvm-svn: 87060
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-15/+20
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* Add PowerPC codegen for indirect branches.Bob Wilson2009-11-041-0/+33
| | | | llvm-svn: 86050
* -Revert parts of 84326 and 84411. Distinquishing between fixed and non-fixedEvan Cheng2009-10-181-2/+2
| | | | | | | | | | | stack slots and giving them different PseudoSourceValue's did not fix the problem of post-alloc scheduling miscompiling llvm itself. - Apply Dan's conservative workaround by assuming any non fixed stack slots can alias other memory locations. This means a load from spill slot #1 cannot move above a store of spill slot #2. - Enable post-alloc scheduling for x86 at optimization leverl Default and above. llvm-svn: 84424
* Only fixed stack objects and spill slots should be get FixedStack ↵Evan Cheng2009-10-181-2/+2
| | | | | | PseudoSourceValue. llvm-svn: 84411
* Revert 84315 for now. Re-thinking the patch.Evan Cheng2009-10-171-4/+4
| | | | llvm-svn: 84321
* Rename getFixedStack to getStackObject. The stack objects represented are notEvan Cheng2009-10-171-4/+4
| | | | | | necessarily fixed. Only those will negative frame indices are "fixed." llvm-svn: 84315
* LBRX no longer has an explicit SrcValueSDNode operand, so the typeDan Gohman2009-09-271-1/+1
| | | | | | | operand is now at index 2, rather than 3. This fixes the "Invalid child # of SDNode!" failures on PowerPC. llvm-svn: 82942
* Improve MachineMemOperand handling.Dan Gohman2009-09-251-15/+22
| | | | | | | | | | | | | | | | | | | | | - Allocate MachineMemOperands and MachineMemOperand lists in MachineFunctions. This eliminates MachineInstr's std::list member and allows the data to be created by isel and live for the remainder of codegen, avoiding a lot of copying and unnecessary translation. This also shrinks MemSDNode. - Delete MemOperandSDNode. Introduce MachineSDNode which has dedicated fields for MachineMemOperands. - Change MemSDNode to have a MachineMemOperand member instead of its own fields with the same information. This introduces some redundancy, but it's more consistent with what MachineInstr will eventually want. - Ignore alignment when searching for redundant loads for CSE, but remember the greatest alignment. Target-specific code which previously used MemOperandSDNodes with generic SDNodes now use MemIntrinsicSDNodes, with opcodes in a designated range so that the SelectionDAG framework knows that MachineMemOperand information is available. llvm-svn: 82794
* Rename getTargetNode to getMachineNode, for consistency with theDan Gohman2009-09-251-3/+3
| | | | | | | | naming scheme used in SelectionDAG, where there are multiple kinds of "target" nodes, but "machine" nodes are nodes which represent a MachineInstr. llvm-svn: 82790
* Don't try to use pre-indexed addressing with sthbrx/stwbrxDan Gohman2009-09-251-1/+2
| | | | | | | instructions. This fixes a PowerPC bug exposed by some unrelated changes I'm working on. llvm-svn: 82743
* Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic ↵Evan Cheng2009-09-191-2/+11
| | | | | | blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks. llvm-svn: 82311
* Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that ↵Evan Cheng2009-09-181-1/+2
| | | | | | | | sdisel will use to properly complete phi nodes. Not functionality change yet. llvm-svn: 82273
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