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path: root/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
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* [PowerPC] handle ISD:TRUNCATE in BitPermutationSelectorHiroshi Inoue2018-12-281-8/+47
* [PPC] Always use the version of computeKnownBits that returns a value. NFCI.Simon Pilgrim2018-12-211-7/+4
* [PowerPC] Exploit power9 new instruction setbKewen Lin2018-12-181-0/+167
* [PowerPC] Improve vec_abs on P9Kewen Lin2018-12-181-95/+0
* [NFC] [PowerPC] add an routine in PPCTargetLowering to determine if a global ...QingShan Zhang2018-12-031-15/+4
* [PowerPC] Fix a conversion is not considered when the ISD::BR_CC node making ...Li Jia He2018-11-291-0/+9
* [PowerPC] Enhance the selection(ISD::VSELECT) of vector typeZi Xuan Wu2018-11-141-8/+0
* [TI removal] Make variables declared as `TerminatorInst` and initializedChandler Carruth2018-10-151-1/+1
* [PowerPC] avoid masking already-zero bits in BitPermutationSelectorHiroshi Inoue2018-10-121-15/+104
* llvm::sort(C.begin(), C.end(), ...) -> llvm::sort(C, ...)Fangrui Song2018-09-271-1/+1
* [PowerPC] Revert commit r339779Nemanja Ivanovic2018-08-271-0/+8
* [PowerPC] Enhance the selection(ISD::VSELECT) of vector typeNemanja Ivanovic2018-08-151-8/+0
* [SDAG] Remove the reliance on MI's allocation strategy forChandler Carruth2018-08-141-6/+4
* Introduce codegen for the Signal Processing EngineJustin Hibbits2018-07-181-6/+72
* [Power9] Add __float128 support for compare operationsStefan Pintilie2018-07-091-2/+7
* If the arch is P9, we will select the DFLOADf32/DFLOADf64 pseudo instruction ...QingShan Zhang2018-06-191-10/+15
* [NFC] fix formattingHiroshi Inoue2018-06-081-1/+1
* [PowerPC] avoid unprofitable Repl32 flag in BitPermutationSelectorHiroshi Inoue2018-06-071-0/+14
* [PowerPC] fix trivial typos in comment, NFCHiroshi Inoue2018-06-071-2/+2
* [PowerPC] reduce rotate in BitPermutationSelectorHiroshi Inoue2018-06-051-1/+7
* [NFC] Zero initialize local variablesHiroshi Inoue2018-06-011-1/+1
* [PowerPC] Fix the incorrect iterator inside peepholeLei Huang2018-05-291-6/+3
* Rename DEBUG macro to LLVM_DEBUG.Nicola Zaghen2018-05-141-73/+73
* [PowerPC] fix incorrect vectorization of abs() on POWER9Hiroshi Inoue2018-04-211-0/+95
* [PowerPC] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-04-081-1/+1
* [PowerPC] allow D-form VSX load/store when accessing FrameIndex without offset Hiroshi Inoue2018-04-061-8/+16
* [IR][CodeGen] Remove dependency on EVT from IR/Function.cpp. Move EVT to Code...Craig Topper2018-03-291-1/+1
* [PowerPC] Secure PLT supportStrahinja Petrovic2018-03-271-0/+21
* Fix layering by moving ValueTypes.h from CodeGen to IRDavid Blaikie2018-03-231-1/+1
* Fix layering of MachineValueType.h by moving it from CodeGen to SupportDavid Blaikie2018-03-231-1/+1
* [PowerPC] Optimize TLS initial-exec sequence to use X-Form loads/storesZaara Syeda2018-03-151-1/+112
* [PowerPC] Disable shrink-wrapping when getting PC address through the LRNemanja Ivanovic2018-02-231-0/+10
* MachineFunction: Return reference from getFunction(); NFCMatthias Braun2017-12-151-1/+1
* Fix code causing fallthrough warnings in the PPC back end.Nemanja Ivanovic2017-12-151-0/+1
* [CodeGen] Print global addresses as @foo in both MIR and debug outputFrancis Visoiu Mistrih2017-12-141-2/+2
* [PowerPC] Follow-up to r318436 to get the missed CSE opportunitiesNemanja Ivanovic2017-12-121-1/+65
* Follow-up to r319434 to turn the pass on by defaultNemanja Ivanovic2017-12-011-1/+1
* [PowerPC] Recommit r314244 with refactoring and off by defaultNemanja Ivanovic2017-11-301-0/+1236
* [CodeGen] Print register names in lowercase in both MIR and debug outputFrancis Visoiu Mistrih2017-11-281-2/+2
* Fix a bunch more layering of CodeGen headers that are in TargetDavid Blaikie2017-11-171-1/+1
* Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layeringDavid Blaikie2017-11-081-1/+1
* Remove unused variables. No functionality change.Benjamin Kramer2017-10-081-2/+0
* [PowerPC] support ZERO_EXTEND in tryBitPermutationHiroshi Inoue2017-10-021-17/+64
* [PowerPC] Reverting sequence of patches for elimination of comparison instruc...Nemanja Ivanovic2017-09-261-1061/+0
* [PowerPC] Eliminate compares - add i64 sext/zext handling for SETLT/SETGTNemanja Ivanovic2017-09-251-2/+76
* [PowerPC] Eliminate compares - add i64 sext/zext handling for SETLE/SETGENemanja Ivanovic2017-09-241-0/+96
* [PowerPC] Eliminate compares - add i32 sext/zext handling for SETULT/SETUGTNemanja Ivanovic2017-09-231-3/+34
* [PowerPC] Eliminate compares - add i32 sext/zext handling for SETULE/SETUGENemanja Ivanovic2017-09-231-0/+73
* [PowerPC] Eliminate compares - add i32 sext/zext handling for SETLT/SETGTNemanja Ivanovic2017-09-231-0/+101
* Remove the default clause from a fully-covering switchNemanja Ivanovic2017-09-221-4/+10
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