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* PPC: Use HWEncoding and TRI->getEncodingValueHal Finkel2013-03-261-2/+2
| | | | | | | | | | | As pointed out by Jakob, we don't need to maintain a separate register-numbering table. Instead we should let TableGen generate the table for us from the information (already present) in PPCRegisterInfo.td. TRI->getEncodingValue is now used to access register-encoding values. No functionality change intended. llvm-svn: 178067
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-021-1/+1
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. llvm-svn: 171366
* This patch improves the 64-bit PowerPC InitialExec TLS support by providingBill Schmidt2012-12-141-8/+0
| | | | | | | | | | | | | | | | | | | | | | | for a wider range of GOT entries that can hold thread-relative offsets. This matches the behavior of GCC, which was not documented in the PPC64 TLS ABI. The ABI will be updated with the new code sequence. Former sequence: ld 9,x@got@tprel(2) add 9,9,x@tls New sequence: addis 9,2,x@got@tprel@ha ld 9,x@got@tprel@l(9) add 9,9,x@tls Note that a linker optimization exists to transform the new sequence into the shorter sequence when appropriate, by replacing the addis with a nop and modifying the base register and relocation type of the ld. llvm-svn: 170209
* This patch introduces initial-exec model support for thread-local storageBill Schmidt2012-12-041-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on 64-bit PowerPC ELF. The patch includes code to handle external assembly and MC output with the integrated assembler. It intentionally does not support the "old" JIT. For the initial-exec TLS model, the ABI requires the following to calculate the address of external thread-local variable x: Code sequence Relocation Symbol ld 9,x@got@tprel(2) R_PPC64_GOT_TPREL16_DS x add 9,9,x@tls R_PPC64_TLS x The register 9 is arbitrary here. The linker will replace x@got@tprel with the offset relative to the thread pointer to the generated GOT entry for symbol x. It will replace x@tls with the thread-pointer register (13). The two test cases verify correct assembly output and relocation output as just described. PowerPC-specific selection node variants are added for the two instructions above: LD_GOT_TPREL and ADD_TLS. These are inserted when an initial-exec global variable is encountered by PPCTargetLowering::LowerGlobalTLSAddress(), and later lowered to machine instructions LDgotTPREL and ADD8TLS. LDgotTPREL is a pseudo that uses the same LDrs support added for medium code model's LDtocL, with a different relocation type. The rest of the processing is straightforward. llvm-svn: 169281
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-4/+4
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Widen the instruction encoder that TblGen emits to a 64 bits, which should ↵Owen Anderson2012-01-241-1/+1
| | | | | | accomodate every target I can think of offhand. llvm-svn: 148833
* make CR spill and restore 64-bit clean (no functional change), and fix some ↵Hal Finkel2011-12-071-2/+4
| | | | | | other problems found with -verify-machineinstrs llvm-svn: 146024
* Refactor PPC target to separate MC routines from Target routines.Evan Cheng2011-07-251-2/+2
| | | | llvm-svn: 135942
* relax an assertion a bit, allowing the GPR argument ofChris Lattner2010-11-161-1/+4
| | | | | | | | these instructions to be encoded with getMachineOpValue. This unbreaks ExecutionEngine/2003-01-04-ArgumentBug.ll when running on a G5 llvm-svn: 119307
* fix a pasto that massively broke the ppc jit while the buildbots happenedChris Lattner2010-11-151-2/+2
| | | | | | to be broken for other reasons llvm-svn: 119283
* split out an encoder for memri operands, allowing a relocation to be ploppedChris Lattner2010-11-151-43/+20
| | | | | | | | | | | | | | | | into the immediate field. This allows us to encode stuff like this: lbz r3, lo16(__ZL4init)(r4) ; globalopt.cpp:5 ; encoding: [0x88,0x64,A,A] ; fixup A - offset: 0, value: lo16(__ZL4init), kind: fixup_ppc_lo16 stw r3, lo16(__ZL1s)(r5) ; globalopt.cpp:6 ; encoding: [0x90,0x65,A,A] ; fixup A - offset: 0, value: lo16(__ZL1s), kind: fixup_ppc_lo16 With this, we should have a completely function MCCodeEmitter for PPC, wewt. llvm-svn: 119134
* add support for encoding the lo14 forms used for a few PPC64 addressingChris Lattner2010-11-151-12/+11
| | | | | | | | | modes. For example, we now get: ld r3, lo16(_G)(r3) ; encoding: [0xe8,0x63,A,0bAAAAAA00] ; fixup A - offset: 0, value: lo16(_G), kind: fixup_ppc_lo14 llvm-svn: 119133
* implement the start of support for lo16 and ha16, allowing us to get stuff like:Chris Lattner2010-11-151-27/+49
| | | | | | | lis r4, ha16(__ZL4init) ; encoding: [0x3c,0x80,A,A] ; fixup A - offset: 0, value: ha16(__ZL4init), kind: fixup_ppc_ha16 llvm-svn: 119127
* change direct branches to encode with the same encoding methodChris Lattner2010-11-151-14/+11
| | | | | | | | as direct calls. Change conditional branches to encode with their own method, simplifying the JIT encoder and making room for adding an mc fixup. llvm-svn: 119125
* split call operands out to their own encoding class, simplifyingChris Lattner2010-11-151-75/+83
| | | | | | | | | | code in the JIT. Use this to form the first fixup for the PPC backend, giving us stuff like this: bl L_foo$stub ; encoding: [0b010010AA,A,A,0bAAAAAA01] ; fixup A - offset: 0, value: L_foo$stub, kind: fixup_ppc_br24 llvm-svn: 119123
* add proper encoding for MTCRF instead of using a hack.Chris Lattner2010-11-151-12/+19
| | | | llvm-svn: 119121
* Make <target>CodeEmitter::getBinaryCodeForInstr() a const method.Jim Grosbach2010-10-081-3/+3
| | | | llvm-svn: 116018
* zap dead code.Chris Lattner2010-09-041-4/+0
| | | | llvm-svn: 113073
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110460
* Revert r110396 to fix buildbots.Owen Anderson2010-08-061-1/+1
| | | | llvm-svn: 110410
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-051-1/+1
| | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. llvm-svn: 110396
* Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission andBill Wendling2010-07-161-1/+1
| | | | | | thus is a much more meaningful name. llvm-svn: 108563
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-1/+1
| | | | llvm-svn: 101334
* change the DBG_LABEL MachineInstr to always be createdChris Lattner2010-03-141-2/+0
| | | | | | with an MCSymbol instead of an immediate. llvm-svn: 98481
* change the LabelSDNode to be EHLabelSDNode and make it holdChris Lattner2010-03-141-1/+3
| | | | | | | | an MCSymbol. Make the EH_LABEL MachineInstr hold its label with an MCSymbol instead of ID. Fix a bug in MMI.cpp which would return labels named "Label4" instead of "label4". llvm-svn: 98463
* change EH related stuff (other than EH_LABEL) to use MCSymbolChris Lattner2010-03-141-2/+4
| | | | | | | | | | | | | | | | instead of label ID's. This cleans up and regularizes a bunch of code and makes way for future progress. Unfortunately, this pointed out to me that JITDwarfEmitter.cpp is largely copy and paste from DwarfException/MachineModuleInfo and other places. This is very sad and disturbing. :( One major change here is that TidyLandingPads moved from being called in DwarfException::BeginFunction to being called in DwarfException::EndFunction. There should not be any functionality change from doing this, but I'm not an EH expert. llvm-svn: 98459
* move target-independent opcodes out of TargetInstrInfoChris Lattner2010-02-091-4/+4
| | | | | | | | | into TargetOpcodes.h. #include the new TargetOpcodes.h into MachineInstr. Add new inline accessors (like isPHI()) to MachineInstr, and start using them throughout the codebase. llvm-svn: 95687
* detemplatize the ppc code emitter.Chris Lattner2010-02-021-37/+21
| | | | llvm-svn: 95142
* remove dead code.Chris Lattner2010-02-021-11/+0
| | | | llvm-svn: 95141
* Remove includes of Support/Compiler.h that are no longer needed after theNick Lewycky2009-10-251-1/+0
| | | | | | VISIBILITY_HIDDEN removal. llvm-svn: 85043
* Remove VISIBILITY_HIDDEN from class/struct found inside anonymous namespaces.Nick Lewycky2009-10-251-2/+1
| | | | | | | Chris claims we should never have visibility_hidden inside any .cpp file but that's still not true even after this commit. llvm-svn: 85042
* Update processDebugLoc() so that it can be used to process debug info before ↵Devang Patel2009-10-061-1/+2
| | | | | | and after printing an instruction. llvm-svn: 83363
* Introduce the TargetInstrInfo::KILL machine instruction and get rid of theJakob Stoklund Olesen2009-09-281-0/+1
| | | | | | | | | | unused DECLARE instruction. KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF in the places where IMPLICIT_DEF is just used to alter liveness of physical registers. llvm-svn: 83006
* Tabs -> spaces, and remove trailing whitespace.Daniel Dunbar2009-09-201-6/+6
| | | | llvm-svn: 82355
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-3/+2
| | | | | | | | MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) llvm-svn: 79813
* r76102 added the MachineCodeEmitter::processDebugLoc call and called it fromJeffrey Yasskin2009-07-171-1/+1
| | | | | | | the X86 Emitter. This patch extends that to the rest of the targets that can write to a MachineCodeEmitter: ARM, Alpha, and PPC. llvm-svn: 76211
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-2/+2
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-1/+1
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Implement changes from Chris's feedback.Torok Edwin2009-07-081-1/+5
| | | | | | Finish converting lib/Target. llvm-svn: 75043
* Add the Object Code Emitter class. Original patch by Aaron Gray, I did someBruno Cardoso Lopes2009-07-061-0/+8
| | | | | | cleanup, removed some #includes and moved Object Code Emitter out-of-line. llvm-svn: 74813
* Refactor ABI code in the PowerPC backend.Tilmann Scheller2009-07-031-5/+5
| | | | | | | | | | | Make CalculateParameterAndLinkageAreaSize() Darwin-specific. Remove SVR4 specific code from LowerCALL_Darwin() and LowerFORMAL_ARGUMENTS_Darwin(). Rename MachoABI to DarwinABI for consistency. Rename ELF ABI to SVR4 ABI for consistency. Factor out common call return lowering between the Darwin and SVR4 ABI. Factor out common call lowering between the Darwin and SVR4 ABI. llvm-svn: 74766
* Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron GrayBruno Cardoso Lopes2009-06-011-16/+17
| | | | llvm-svn: 72697
* First patch in the direction of splitting MachineCodeEmitter in two subclasses:Bruno Cardoso Lopes2009-05-301-20/+42
| | | | | | JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray llvm-svn: 72631
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-9/+9
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Tidy up several unbeseeming casts from pointer to intptr_t.Dan Gohman2008-09-041-1/+1
| | | | llvm-svn: 55779
* Change getBinaryCodeForInstr prototype. First operand MachineInstr& should ↵Evan Cheng2008-09-021-6/+7
| | | | | | be const. Make corresponding changes. llvm-svn: 55623
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-1/+2
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Provide generic hooks for icache invalidation. Add PPC implementation.Anton Korobeynikov2008-06-171-4/+0
| | | | | | Patch by Gary Benson! llvm-svn: 52418
* Tail call optimization improvements:Arnold Schwaighofer2008-04-301-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move platform independent code (lowering of possibly overwritten arguments, check for tail call optimization eligibility) from target X86ISelectionLowering.cpp to TargetLowering.h and SelectionDAGISel.cpp. Initial PowerPC tail call implementation: Support ppc32 implemented and tested (passes my tests and test-suite llvm-test). Support ppc64 implemented and half tested (passes my tests). On ppc tail call optimization is performed if caller and callee are fastcc call is a tail call (in tail call position, call followed by ret) no variable argument lists or byval arguments option -tailcallopt is enabled Supported: * non pic tail calls on linux/darwin * module-local tail calls on linux(PIC/GOT)/darwin(PIC) * inter-module tail calls on darwin(PIC) If constraints are not met a normal call will be emitted. A test checking the argument lowering behaviour on x86-64 was added. llvm-svn: 50477
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