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* [PowerPC] Add predicted forms of branchesUlrich Weigand2013-06-241-9/+79
| | | | | | | | | | | | | | | | | | | | This adds support for the predicted forms of branches (+/-). There are three cases to consider: - Branches using a PPC::Predicate code For these, I've added new PPC::Predicate codes corresponding to the BO values for predicted branch forms, and updated insn printing to print them correctly. I've also added new aliases for the asm parser matching the new forms. - bt/bf I've added new aliases matching to gBC etc. - bd(n)z variants I've added new instruction patterns for the predicted forms. In all cases, the new patterns are used for the asm parser only. (The new infrastructure ought to be sufficient to allow use by the compiler too at some point.) llvm-svn: 184754
* [PowerPC] Support absolute branchesUlrich Weigand2013-06-242-4/+7
| | | | | | | | | | | | | | | | | | There is currently only limited support for the "absolute" variants of branch instructions. This patch adds support for the absolute variants of all branches that are currently otherwise supported. This requires adding new fixup types so that the correct variant of relocation type can be selected by the object writer. While the compiler will continue to usually choose the relative branch variants, this will allow the asm parser to fully support the absolute branches, with either immediate (numerical) or symbolic target addresses. No change in code generation intended. llvm-svn: 184721
* Revert r183854 (PPC: Fix switch warnings from r183841)David Blaikie2013-06-121-1/+0
| | | | | | | Now that the PRED_BAD has been removed, this is failing the Clang -Werror build due to -Wcovered-switch-default. llvm-svn: 183863
* [PowerPC] Fix switch warnings from r183841.Bill Schmidt2013-06-121-0/+1
| | | | | | | Introducing PRED_BAD caused some unexpected warnings that are now suppressed. llvm-svn: 183854
* [PowerPC] Clean up generation of ha16() / lo16() markersUlrich Weigand2013-05-232-41/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When targeting the Darwin assembler, we need to generate markers ha16() and lo16() to designate the high and low parts of a (symbolic) immediate. This is necessary not just for plain symbols, but also for certain symbolic expression, typically along the lines of ha16(A - B). The latter doesn't work when simply using VariantKind flags on the symbol reference. This is why the current back-end uses hacks (explicitly called out as such via multiple FIXMEs) in the symbolLo/symbolHi print methods. This patch uses target-defined MCExpr codes to represent the Darwin ha16/lo16 constructs, following along the lines of the equivalent solution used by the ARM back end to handle their :upper16: / :lower16: markers. This allows us to get rid of special handling both in the symbolLo/symbolHi print method and in the common code MCExpr::print routine. Instead, the ha16 / lo16 markers are printed simply in a custom print routine for the target MCExpr types. (As a result, the symbolLo/symbolHi print methods can now replaced by a single printS16ImmOperand routine that also handles symbolic operands.) The patch also provides a EvaluateAsRelocatableImpl routine to handle ha16/lo16 constructs. This is not actually used at the moment by any in-tree code, but is provided as it makes merging into David Fang's out-of-tree Mach-O object writer simpler. Since there is no longer any need to treat VK_PPC_GAS_HA16 and VK_PPC_DARWIN_HA16 differently, they are merged into a single VK_PPC_ADDR16_HA (and likewise for the _LO16 types). llvm-svn: 182616
* [PowerPC] Use true offset value in "memrix" machine operandsUlrich Weigand2013-05-162-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the second part of the change to always return "true" offset values from getPreIndexedAddressParts, tackling the case of "memrix" type operands. This is about instructions like LD/STD that only have a 14-bit field to encode immediate offsets, which are implicitly extended by two zero bits by the machine, so that in effect we can access 16-bit offsets as long as they are a multiple of 4. The PowerPC back end currently handles such instructions by carrying the 14-bit value (as it will get encoded into the actual machine instructions) in the machine operand fields for such instructions. This means that those values are in fact not the true offset, but rather the offset divided by 4 (and then truncated to an unsigned 14-bit value). Like in the case fixed in r182012, this makes common code operations on such offset values not work as expected. Furthermore, there doesn't really appear to be any strong reason why we should encode machine operands this way. This patch therefore changes the encoding of "memrix" type machine operands to simply contain the "true" offset value as a signed immediate value, while enforcing the rules that it must fit in a 16-bit signed value and must also be a multiple of 4. This change must be made simultaneously in all places that access machine operands of this type. However, just about all those changes make the code simpler; in many cases we can now just share the same code for memri and memrix operands. llvm-svn: 182032
* [PowerPC] Avoid using '$' in generated assembler codeUlrich Weigand2013-05-031-2/+2
| | | | | | | | | | | | PowerPC assemblers are supposed to support a stand-alone '$' symbol as an alternative of '.' to refer to the current PC. This does not work in the LLVM assembler parser yet. To avoid bootstrap failures when using the LLVM assembler as system assembler, this patch modifies the assembler source code generated by LLVM to avoid using '$' (and simply use '.' instead). llvm-svn: 181054
* PPC: Use HWEncoding and TRI->getEncodingValueHal Finkel2013-03-261-1/+1
| | | | | | | | | | | As pointed out by Jakob, we don't need to maintain a separate register-numbering table. Instead we should let TableGen generate the table for us from the information (already present) in PPCRegisterInfo.td. TRI->getEncodingValue is now used to access register-encoding values. No functionality change intended. llvm-svn: 178067
* PowerPC: Use CCBITRC operand for ISEL patterns.Ulrich Weigand2013-03-261-25/+0
| | | | | | | | | | | | This commit changes the ISEL patterns to use a CCBITRC operand instead of a "pred" operand. This matches the actual instruction text more directly, and simplifies use of ISEL with the asm parser. In addition, this change allows some simplification of handling the "pred" operand, as this is now only used by BCC. No change in generated code. llvm-svn: 178003
* PowerPC: Simplify BLR pattern.Ulrich Weigand2013-03-261-3/+0
| | | | | | | | | | | | | | | | | The BLR pattern cannot be recognized by the asm parser in its current form. This complexity is due to an apparent attempt to enable conditional BLR variants. However, none of those can ever be generated by current code; the pattern is only ever created using the default "pred" operand. To simplify the pattern and allow it to be recognized by the parser, this commit removes those attempts at conditional BLR support. When we later come back to actually add real conditional BLR, this should probably be done via a fully generic conditional branch pattern. No change in generated code. llvm-svn: 178002
* PR12716: PPC crashes on vector compareAdhemerval Zanella2012-10-081-3/+3
| | | | | | | | | | | | | | | | | | Vector compare using altivec 'vcmpxxx' instructions have as third argument a vector register instead of CR one, different from integer and float-point compares. This leads to a failure in code generation, where 'SelectSETCC' expects a DAG with a CR register and gets vector register instead. This patch changes the behavior by just returning a DAG with the vector compare instruction based on the type. The patch also adds a testcase for all vector types llvm defines. It also included a fix on signed 5-bits predicates printing, where signed values were not handled correctly as signed (char are unsigned by default for PowerPC). This generates 'vspltisw' (vector splat) instruction with SIM out of range. llvm-svn: 165419
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-241-1/+1
| | | | | | Reviewed offline by chandlerc. llvm-svn: 162623
* Silence an unused variable warning on release builds.Craig Topper2012-06-231-2/+2
| | | | llvm-svn: 159074
* Add support for the PPC isel instruction.Hal Finkel2012-06-222-2/+27
| | | | | | | The isel (integer select) instruction is supported on the 440 and A2 embedded cores and on the POWER7. llvm-svn: 159045
* Move getOpcodeName from the various target InstPrinters into the superclass ↵Benjamin Kramer2012-04-022-5/+0
| | | | | | | | MCInstPrinter. All implementations used the same code. llvm-svn: 153866
* Remove getInstructionName from MCInstPrinter implementations in favor of ↵Craig Topper2012-04-022-4/+2
| | | | | | using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. llvm-svn: 153863
* Make MCInstrInfo available to the MCInstPrinter. This will be used to remove ↵Craig Topper2012-04-021-3/+3
| | | | | | getInstructionName and the static data it contains since the same tables are already in MCInstrInfo. llvm-svn: 153860
* Make MCRegisterInfo available to the the MCInstPrinter.Jim Grosbach2012-03-051-2/+3
| | | | | | | Used to allow context sensitive printing of super-register or sub-register references. llvm-svn: 152043
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-071-1/+1
| | | | llvm-svn: 149961
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-1/+0
| | | | llvm-svn: 147855
* LLVMBuild: Remove trailing newline, which irked me.Daniel Dunbar2011-12-121-1/+0
| | | | llvm-svn: 146409
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-291-5/+0
| | | | llvm-svn: 145420
* build: Add initial cut at LLVMBuild.txt files.Daniel Dunbar2011-11-031-0/+24
| | | | llvm-svn: 143634
* These do not need to be conditional on the presence of CommentStream, as ↵Owen Anderson2011-09-211-4/+4
| | | | | | they have a fallback path now. llvm-svn: 140267
* In the disassembler C API, be careful not to confuse the comment streamer ↵Owen Anderson2011-09-211-4/+4
| | | | | | that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on. llvm-svn: 140217
* Don't attach annotations to MCInst's. Instead, have the disassembler ↵Owen Anderson2011-09-152-2/+8
| | | | | | return, and the printer accept, an annotation string which can be passed through if the client cares about annotations. llvm-svn: 139876
* Rewrite the CMake build to use explicit dependencies between libraries,Chandler Carruth2011-07-291-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | specified in the same file that the library itself is created. This is more idiomatic for CMake builds, and also allows us to correctly specify dependencies that are missed due to bugs in the GenLibDeps perl script, or change from compiler to compiler. On Linux, this returns CMake to a place where it can relably rebuild several targets of LLVM. I have tried not to change the dependencies from the ones in the current auto-generated file. The only places I've really diverged are in places where I was seeing link failures, and added a dependency. The goal of this patch is not to start changing the dependencies, merely to move them into the correct location, and an explicit form that we can control and change when necessary. This also removes a serialization point in the build because we don't have to scan all the libraries before we begin building various tools. We no longer have a step of the build that regenerates a file inside the source tree. A few other associated cleanups fall out of this. This isn't really finished yet though. After talking to dgregor he urged switching to a single CMake macro to construct libraries with both sources and dependencies in the arguments. Migrating from the two macros to that style will be a follow-up patch. Also, llvm-config is still generated with GenLibDeps.pl, which means it still has slightly buggy dependencies. The internal CMake 'llvm-config-like' macro uses the correct explicitly specified dependencies however. A future patch will switch llvm-config generation (when using CMake) to be based on these deps as well. This may well break Windows. I'm getting a machine set up now to dig into any failures there. If anyone can chime in with problems they see or ideas of how to solve them for Windows, much appreciated. llvm-svn: 136433
* Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng2011-07-261-1/+2
| | | | | | MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. llvm-svn: 136027
* Clean up a pile of hacks in our CMake build relating to TableGen.Chandler Carruth2011-07-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first problem to fix is to stop creating synthetic *Table_gen targets next to all of the LLVM libraries. These had no real effect as CMake specifies that add_custom_command(OUTPUT ...) directives (what the 'tablegen(...)' stuff expands to) are implicitly added as dependencies to all the rules in that CMakeLists.txt. These synthetic rules started to cause problems as we started more and more heavily using tablegen files from *subdirectories* of the one where they were generated. Within those directories, the set of tablegen outputs was still available and so these synthetic rules added them as dependencies of those subdirectories. However, they were no longer properly associated with the custom command to generate them. Most of the time this "just worked" because something would get to the parent directory first, and run tablegen there. Once run, the files existed and the build proceeded happily. However, as more and more subdirectories have started using this, the probability of this failing to happen has increased. Recently with the MC refactorings, it became quite common for me when touching a large enough number of targets. To add insult to injury, several of the backends *tried* to fix this by adding explicit dependencies back to the parent directory's tablegen rules, but those dependencies didn't work as expected -- they weren't forming a linear chain, they were adding another thread in the race. This patch removes these synthetic rules completely, and adds a much simpler function to declare explicitly that a collection of tablegen'ed files are referenced by other libraries. From that, we can add explicit dependencies from the smaller libraries (such as every architectures Desc library) on this and correctly form a linear sequence. All of the backends are updated to use it, sometimes replacing the existing attempt at adding a dependency, sometimes adding a previously missing dependency edge. Please let me know if this causes any problems, but it fixes a rather persistent and problematic source of build flakiness on our end. llvm-svn: 136023
* createMCInstPrinter doesn't need TargetMachine anymore.Evan Cheng2011-07-061-3/+1
| | | | llvm-svn: 134525
* Don't hardcode the %reg format in the streamer.Rafael Espindola2011-06-022-3/+3
| | | | llvm-svn: 132451
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-302-0/+4
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* We need to pass the TargetMachine object to the InstPrinter if we are printingBill Wendling2011-03-211-2/+5
| | | | | | | | | the alias of an InstAlias instead of the thing being aliased. Because we need to know the features that are valid for an InstAlias. This is part of a work-in-progress. llvm-svn: 127986
* Namespacify.Benjamin Kramer2010-11-251-1/+1
| | | | llvm-svn: 120146
* eliminate a now-unneeded operand printer.Chris Lattner2010-11-151-3/+0
| | | | llvm-svn: 119124
* dissolve some more hacks.Chris Lattner2010-11-151-6/+0
| | | | llvm-svn: 119115
* fix some fixme's, removing dead code.Chris Lattner2010-11-151-8/+2
| | | | llvm-svn: 119114
* remove asmstrings (which can never be printed) from pseudo Chris Lattner2010-11-152-17/+0
| | | | | | | instructions, allowing is to eliminate some dead operand printing methods from the instprinter. llvm-svn: 119113
* add targetoperand flags for jump tables, constant pool and block addressChris Lattner2010-11-151-4/+22
| | | | | | | | | | | | | | nodes to indicate when ha16/lo16 modifiers should be used. This lets us pass PowerPC/indirectbr.ll. The one annoying thing about this patch is that the MCSymbolExpr isn't expressive enough to represent ha16(label1-label2) which we need on PowerPC. I have a terrible hack in the meantime, but this will have to be revisited at some point. Last major conversion item left is global variable references. llvm-svn: 119105
* make the stubbed-out printer methods abort instead of Chris Lattner2010-11-142-3/+18
| | | | | | printing nothing. This gets us back up to 24 failures. llvm-svn: 119083
* wire up a few more things, down to 4 test failures, allChris Lattner2010-11-142-19/+39
| | | | | | about handling $stub, lo/hi etc. llvm-svn: 119082
* implement pretty printing support for the various pseudoChris Lattner2010-11-141-0/+45
| | | | | | | ops the asmprinter supported, fixing PowerPC/rlwimi2.ll among others. Down to 20 failures. llvm-svn: 119080
* Wire up symbol hi/lo printing. We don't print hi()/lo(), but this getsChris Lattner2010-11-142-4/+17
| | | | | | us further along. Only 28 failures now. llvm-svn: 119079
* implement basic support for symbol operand lowering,Chris Lattner2010-11-142-2/+17
| | | | | | and printing support for call operands. Down to 77 failures. llvm-svn: 119078
* implement basic support for memory operands and crbit operands,Chris Lattner2010-11-142-5/+72
| | | | | | this fixes 3 more ppc tests. llvm-svn: 119065
* implement several trivial operand printers, reducingChris Lattner2010-11-142-6/+56
| | | | | | failures in CodeGen/PowerPC from 120 -> 117 llvm-svn: 119063
* Implement support for printing register and immediate operands,Chris Lattner2010-11-142-3/+45
| | | | | | | | | | | | | | add support for darwin vs aix syntax. We now can print instructions like this: add r3, r3, r4 blr and (in aix mode): add 3, 3, 4 blr llvm-svn: 119062
* stub out a powerpc MCInstPrinter implementation.Chris Lattner2010-11-144-0/+130
llvm-svn: 119059
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