| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
|
|
|
|
|
|
|
|
| |
This commit changes the ISEL patterns to use a CCBITRC operand
instead of a "pred" operand. This matches the actual instruction
text more directly, and simplifies use of ISEL with the asm parser.
In addition, this change allows some simplification of handling
the "pred" operand, as this is now only used by BCC.
No change in generated code.
llvm-svn: 178003
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The BLR pattern cannot be recognized by the asm parser in its current form.
This complexity is due to an apparent attempt to enable conditional BLR
variants. However, none of those can ever be generated by current code;
the pattern is only ever created using the default "pred" operand.
To simplify the pattern and allow it to be recognized by the parser,
this commit removes those attempts at conditional BLR support.
When we later come back to actually add real conditional BLR, this
should probably be done via a fully generic conditional branch pattern.
No change in generated code.
llvm-svn: 178002
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Vector compare using altivec 'vcmpxxx' instructions have as third argument
a vector register instead of CR one, different from integer and float-point
compares. This leads to a failure in code generation, where 'SelectSETCC'
expects a DAG with a CR register and gets vector register instead.
This patch changes the behavior by just returning a DAG with the
vector compare instruction based on the type. The patch also adds a testcase
for all vector types llvm defines.
It also included a fix on signed 5-bits predicates printing, where
signed values were not handled correctly as signed (char are unsigned by
default for PowerPC). This generates 'vspltisw' (vector splat)
instruction with SIM out of range.
llvm-svn: 165419
|
|
|
|
|
|
| |
Reviewed offline by chandlerc.
llvm-svn: 162623
|
|
|
|
| |
llvm-svn: 159074
|
|
|
|
|
|
|
| |
The isel (integer select) instruction is supported on the 440 and A2
embedded cores and on the POWER7.
llvm-svn: 159045
|
|
|
|
|
|
|
|
| |
MCInstPrinter.
All implementations used the same code.
llvm-svn: 153866
|
|
|
|
|
|
| |
using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.
llvm-svn: 153863
|
|
|
|
| |
llvm-svn: 149961
|
|
|
|
| |
llvm-svn: 147855
|
|
|
|
|
|
| |
they have a fallback path now.
llvm-svn: 140267
|
|
|
|
|
|
| |
that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.
llvm-svn: 140217
|
|
|
|
|
|
| |
return, and the printer accept, an annotation string which can be passed through if the client cares about annotations.
llvm-svn: 139876
|
|
|
|
|
|
| |
MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser.
llvm-svn: 136027
|
|
|
|
| |
llvm-svn: 132451
|
|
|
|
|
|
|
|
| |
directives.
Fixes PR9826.
llvm-svn: 132317
|
|
|
|
| |
llvm-svn: 120146
|
|
|
|
| |
llvm-svn: 119115
|
|
|
|
| |
llvm-svn: 119114
|
|
|
|
|
|
|
| |
instructions, allowing is to eliminate some dead operand
printing methods from the instprinter.
llvm-svn: 119113
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
nodes to indicate when ha16/lo16 modifiers should be used. This lets
us pass PowerPC/indirectbr.ll.
The one annoying thing about this patch is that the MCSymbolExpr isn't
expressive enough to represent ha16(label1-label2) which we need on
PowerPC. I have a terrible hack in the meantime, but this will have
to be revisited at some point.
Last major conversion item left is global variable references.
llvm-svn: 119105
|
|
|
|
|
|
| |
printing nothing. This gets us back up to 24 failures.
llvm-svn: 119083
|
|
|
|
|
|
| |
about handling $stub, lo/hi etc.
llvm-svn: 119082
|
|
|
|
|
|
|
| |
ops the asmprinter supported, fixing PowerPC/rlwimi2.ll
among others. Down to 20 failures.
llvm-svn: 119080
|
|
|
|
|
|
| |
us further along. Only 28 failures now.
llvm-svn: 119079
|
|
|
|
|
|
| |
and printing support for call operands. Down to 77 failures.
llvm-svn: 119078
|
|
|
|
|
|
| |
this fixes 3 more ppc tests.
llvm-svn: 119065
|
|
|
|
|
|
| |
failures in CodeGen/PowerPC from 120 -> 117
llvm-svn: 119063
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
add support for darwin vs aix syntax. We now can print instructions
like this:
add r3, r3, r4
blr
and (in aix mode):
add 3, 3, 4
blr
llvm-svn: 119062
|
|
llvm-svn: 119059
|