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llvm-svn: 127873
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- Emit all arrays as type .b8 and proper sizes in bytes to conform
to the output of nvcc
llvm-svn: 127584
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llvm-svn: 127577
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llvm-svn: 127569
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llvm-svn: 126936
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llvm-svn: 126838
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- Add '64bit' sub-target option.
- Select 32-bit/64-bit loads/stores based on '64bit' option.
- Fix function parameter order.
Patch by Justin Holewinski
llvm-svn: 126837
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- Allow i16, i32, i64, float, and double types, using the native .u16,
.u32, .u64, .f32, and .f64 PTX types.
- Allow loading/storing of all primitive types.
- Allow primitive types to be passed as parameters.
- Allow selection of PTX Version and Shader Model as sub-target attributes.
- Merge integer/floating-point test cases for load/store.
- Use .u32 instead of .s32 to conform to output from NVidia nvcc compiler.
Patch by Justin Holewinski
llvm-svn: 126824
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- Add appropriate TableGen patterns for fadd, fsub, fmul.
- Add .f32 as the PTX type for the LLVM float type.
- Allow parameters, return values, and global variable declarations
to accept the float type.
- Add appropriate test cases.
Patch by Justin Holewinski
llvm-svn: 126636
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llvm-svn: 125279
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llvm-svn: 122638
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llvm-svn: 122398
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llvm-svn: 120571
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llvm-svn: 120423
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support register and register-immediate addressing mode
todo: immediate and register-register addressing mode
llvm-svn: 120407
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llvm-svn: 119485
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that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.
llvm-svn: 119056
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