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path: root/llvm/lib/Target/PIC16/PIC16RegisterInfo.cpp
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* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-4/+4
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Checking in conditionals, function call, arrays and libcalls implementation.Sanjiv Gupta2009-01-131-0/+9
| | | | llvm-svn: 62174
* Added a more function PIC16 backend. However to get this working a patch inSanjiv Gupta2008-11-191-165/+27
| | | | | | ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. llvm-svn: 59617
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-1/+1
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Pool-allocation for MachineInstrs, MachineBasicBlocks, andDan Gohman2008-07-071-1/+1
| | | | | | | | | | | MachineMemOperands. The pools are owned by MachineFunctions. This drastically reduces the number of calls to malloc/free made during the "Emit" phase of scheduling, as well as later phases in CodeGen. Combined with other changes, this speeds up the "instruction selection" phase of CodeGen by 10% in some cases. llvm-svn: 53212
* Detabification. Fixed indentation and spacing.Sanjiv Gupta2008-05-141-15/+12
| | | | | | | Changed cout to DOUT, and TODOs to FIXMEs. Other changes as per coding conventions. llvm-svn: 51105
* Adding files for Microchip's PIC16 target.Sanjiv Gupta2008-05-131-0/+223
A brief description about PIC16: =============================== PIC16 is an 8-bit microcontroller with only one 8-bit register which is the accumulator. All arithmetic/load/store operations are 8-bit only. The architecture has two address spaces: program and data. The program memory is divided into 2K pages and the data memory is divided into banks of 128 byte, with only 80 usable bytes, resulting in an non-contiguous data memory. It supports direct data memory access (by specifying the address as part of the instruction) and indirect data and program memory access (in an unorthodox fashion which utilize a 16 bit pointer register). Two classes of registers exist: (8-bit class which is only one accumulator) (16-bit class, which contains one or more 16 bit pointer(s)) llvm-svn: 51027
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