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* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-072-2/+6
| | | | | | code can do calling-convention queries. This obviates OutputArgReg. llvm-svn: 107786
* Propagate debug loc.Devang Patel2010-07-061-4/+4
| | | | llvm-svn: 107710
* Reapply r107655 with fixes; insert the pseudo instruction intoDan Gohman2010-07-061-16/+15
| | | | | | | the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. llvm-svn: 107691
* Revert r107655.Dan Gohman2010-07-061-15/+16
| | | | llvm-svn: 107668
* Fix a bunch of custom-inserter functions to handle the case whereDan Gohman2010-07-061-16/+15
| | | | | | the pseudo instruction is not at the end of the block. llvm-svn: 107655
* Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill ↵Evan Cheng2010-07-031-5/+5
| | | | | | slots so it's always false. llvm-svn: 107550
* Remove isTwoAddress from Mips.Eric Christopher2010-06-211-1/+1
| | | | llvm-svn: 106465
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-172-10/+10
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola2010-06-022-5/+7
| | | | llvm-svn: 105344
* cleanupRafael Espindola2010-06-022-31/+0
| | | | llvm-svn: 105322
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-20/+6
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104704
* Revert "Replace the SubRegSet tablegen class with a less error-prone mechanism."Jakob Stoklund Olesen2010-05-261-6/+20
| | | | | | This reverts commit 104654. llvm-svn: 104660
* Replace the SubRegSet tablegen class with a less error-prone mechanism.Jakob Stoklund Olesen2010-05-261-20/+6
| | | | | | | | | | | | | | | | A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. llvm-svn: 104654
* Remove NumberHack entirely.Jakob Stoklund Olesen2010-05-251-2/+2
| | | | | | | SubRegIndex instances are now numbered uniquely the same way Register instances are - in lexicographical order by name. llvm-svn: 104627
* Switch SubRegSet to using symbolic SubRegIndicesJakob Stoklund Olesen2010-05-241-8/+8
| | | | llvm-svn: 104571
* Replace the tablegen RegisterClass field SubRegClassList with an alist-like dataJakob Stoklund Olesen2010-05-241-1/+1
| | | | | | | | | | | structure that represents a mapping without any dependencies on SubRegIndex numbering. This brings us closer to being able to remove the explicit SubRegIndex numbering, and it is now possible to specify any mapping without inventing *_INVALID register classes. llvm-svn: 104563
* SubRegIndex'ize MipsJakob Stoklund Olesen2010-05-243-17/+10
| | | | llvm-svn: 104514
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-142-6/+6
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-114-4/+13
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-062-6/+6
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-062-4/+8
| | | | llvm-svn: 103193
* No-ops emitted for scheduling don't correspond with anything in theDan Gohman2010-05-051-1/+0
| | | | | | user's source, so don't arbitrarily assign them a debug location. llvm-svn: 103121
* fix some inconsistent line endings, patch by Jakub Staszak!Chris Lattner2010-05-011-7/+7
| | | | llvm-svn: 102852
* Get rid of the EdgeMapping map. Instead, just check for BasicBlockDan Gohman2010-05-012-9/+5
| | | | | | changes before doing phi lowering for switches. llvm-svn: 102809
* Use MachineOperand::is* predicates.Devang Patel2010-04-271-1/+1
| | | | llvm-svn: 102472
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* Make processor FUs unique for given itinerary. This extends the limit of 32Anton Korobeynikov2010-04-181-1/+1
| | | | | | | FU per CPU arch to 32 per intinerary allowing precise modelling of quite complex pipelines in the future. llvm-svn: 101754
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-174-35/+36
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Move per-function state out of TargetLowering subclasses and intoDan Gohman2010-04-173-8/+16
| | | | | | MachineFunctionInfo subclasses. llvm-svn: 101634
* Add skeleton target-specific SelectionDAGInfo files.Dan Gohman2010-04-163-0/+52
| | | | llvm-svn: 101564
* Add const qualifiers to CodeGen's use of LLVM IR constructs.Dan Gohman2010-04-151-2/+2
| | | | llvm-svn: 101334
* delete a forwarding function.Chris Lattner2010-04-081-6/+7
| | | | llvm-svn: 100815
* add newlines at end of files.Chris Lattner2010-04-071-1/+1
| | | | llvm-svn: 100706
* Disambiguate else.Benjamin Kramer2010-04-051-1/+2
| | | | llvm-svn: 100423
* prune some #includes.Chris Lattner2010-04-051-2/+0
| | | | llvm-svn: 100399
* Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field.Jakob Stoklund Olesen2010-04-051-4/+1
| | | | | | | | | | | | | | | | | | | When a target instruction wants to set target-specific flags, it should simply set bits in the TSFlags bit vector defined in the Instruction TableGen class. This works well because TableGen resolves member references late: class I : Instruction { AddrMode AM = AddrModeNone; let TSFlags{3-0} = AM.Value; } let AM = AddrMode4 in def ADD : I; TSFlags gets the expected bits from AddrMode4 in this example. llvm-svn: 100384
* Momentous day: remove the "O" member from AsmPrinter. Now all Chris Lattner2010-04-041-11/+4
| | | | | | | | | | "asm printering" happens through MCStreamer. This also Streamerizes PIC16 debug info, which escaped my attention. This removes a leak from LLVMTargetMachine of the 'legacy' output stream. llvm-svn: 100327
* mcize a bunch more stuff, using EmitRawText for things weChris Lattner2010-04-041-27/+31
| | | | | | don't have mcstreamer support for yet. llvm-svn: 100319
* convert the non-MCInstPrinter'ized EmitInstruction Chris Lattner2010-04-041-4/+6
| | | | | | | implementations to use EmitRawText instead of writing directly to "O". llvm-svn: 100318
* fix PrintAsmOperand and PrintAsmMemoryOperand to pass down Chris Lattner2010-04-041-2/+4
| | | | | | raw_ostream to print to. llvm-svn: 100313
* change a ton of code to not implicitly use the "O" raw_ostreamChris Lattner2010-04-041-30/+32
| | | | | | member of AsmPrinter. Instead, pass it in explicitly. llvm-svn: 100306
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-022-7/+6
| | | | llvm-svn: 100214
* Teach AnalyzeBranch, RemoveBranch and the branchDale Johannesen2010-04-021-1/+14
| | | | | | | folder to be tolerant of debug info following the branch(es) at the end of a block. llvm-svn: 100168
* the FPCmp node returns an i32.Chris Lattner2010-03-281-6/+8
| | | | llvm-svn: 99737
* set SDNPVariadic on nodes throughout the rest of the targets thatChris Lattner2010-03-191-1/+2
| | | | | | need them. llvm-svn: 98937
* eliminate the now-unneeded context argument of MBB::getSymbol()Chris Lattner2010-03-131-1/+1
| | | | llvm-svn: 98451
* rearrange MCContext ownership. Before LLVMTargetMachine created it Chris Lattner2010-03-131-3/+2
| | | | | | | | | | | and passing off ownership to AsmPrinter. Now MachineModuleInfo creates it and owns it by value. This allows us to use MCSymbols more consistently throughout the rest of the code generator, and simplifies a bit of code. This also allows MachineFunction to keep an MCContext reference handy, and cleans up the TargetRegistry interfaces for AsmPrinters. llvm-svn: 98450
* Fix LLVM build when the user specifies CPPFLAGS on the make command line.Jeffrey Yasskin2010-03-121-1/+1
| | | | llvm-svn: 98394
* inline GetGlobalValueSymbol into the rest its callers andChris Lattner2010-03-121-1/+2
| | | | | | remove it. llvm-svn: 98390
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-092-2/+2
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
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