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* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-154-1/+9
| | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 194865
* [mips][msa] lowerMSABitClear() should use SelectionDAG::getNOT() instead of ↵Daniel Sanders2013-11-151-14/+2
| | | | | | | | | using a long-winded equivalent. Now that getConstant(-1, MVT::v2i64) works correctly on MIPS32 we can use SelectionDAG::getNOT() to produce the bitmask. llvm-svn: 194819
* Fix illegal DAG produced by SelectionDAG::getConstant() for v2i64 typeDaniel Sanders2013-11-151-59/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: When getConstant() is called for an expanded vector type, it is split into multiple scalar constants which are then combined using appropriate build_vector and bitcast operations. In addition to the usual big/little endian differences, the case where the element-order of the vector does not have the same endianness as the elements themselves is also accounted for. For example, for v4i32 on big-endian MIPS, the byte-order of the vector is <3210,7654,BA98,FEDC>. For little-endian, it is <0123,4567,89AB,CDEF>. Handling this case turns out to be a nop since getConstant() returns a splatted vector (so reversing the element order doesn't change the value) This fixes a number of cases in MIPS MSA where calling getConstant() during operation legalization introduces illegal types (e.g. to legalize v2i64 UNDEF into a v2i64 BUILD_VECTOR of illegal i64 zeros). It should also handle bigger differences between illegal and legal types such as legalizing v2i64 into v8i16. lowerMSASplatImm() in the MIPS backend no longer needs to avoid calling getConstant() so this function has been updated in the same patch. For the sake of transparency, the steps I've taken since the review are: * Added 'virtual' to isVectorEltOrderLittleEndian() as requested. This revealed that the MIPS tests were falsely passing because a polymorphic function was not actually polymorphic in the reviewed patch. * Fixed the tests that were now failing. This involved deleting the code to handle the MIPS MSA element-order (which was previously doing an byte-order swap instead of an element-order swap). This left isVectorEltOrderLittleEndian() unused and it was deleted. * Fixed build failures caused by rebasing beyond r194467-r194472. These build failures involved the bset, bneg, and bclr instructions added in these commits using lowerMSASplatImm() in a way that was no longer valid after this patch. Some of these were fixed by calling SelectionDAG::getConstant() instead, others were fixed by a new function getBuildVectorSplat() that provided the removed functionality of lowerMSASplatImm() in a more sensible way. Reviewers: bkramer Reviewed By: bkramer CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D1973 llvm-svn: 194811
* Use instr mapping for microMIPS in llvm-mc.Zoran Jovanovic2013-11-152-5/+9
| | | | llvm-svn: 194792
* Make all the conditional Mips 16 branches get initially set for theReed Kotler2013-11-153-28/+46
| | | | | | | | | | short form. Constant islands will expand them if they are out of range. Since there is not direct object emitter at this time, it does not have any material affect because the assembler sorts this out. But we need to know for the actual constant island work. We track the difference by putting # 16 inst in the comments. llvm-svn: 194766
* Take care of long short branch immediate instructions for mips16 inReed Kotler2013-11-131-5/+10
| | | | | | constant islands. llvm-svn: 194630
* Fix bug in .gpword directive parsing.Vladimir Medic2013-11-131-4/+2
| | | | llvm-svn: 194570
* Support for microMIPS trap instruction with immediate operands.Zoran Jovanovic2013-11-134-8/+27
| | | | llvm-svn: 194569
* This patch fixes a bug in floating point operands parsing, when instruction ↵Vladimir Medic2013-11-131-2/+19
| | | | | | alias uses default register operand. llvm-svn: 194562
* Mips16InstrInfo.cpp: Use <cctype> instead of <ctype.h>NAKAMURA Takumi2013-11-131-2/+1
| | | | | | Also, prune <stdlib.h>, seems stray. llvm-svn: 194557
* Allow the code which returns the length for inline assembler to knowReed Kotler2013-11-133-3/+52
| | | | | | | | | specifically about the .space directive. This allows us to force large blocks of code to appear in test cases for things like constant islands without having to make giant test cases to force things like long branches to take effect. llvm-svn: 194555
* [mips] Fix a bug in function CC_MipsO32_FP64. The second double precisionAkira Hatanaka2013-11-121-1/+1
| | | | | | | argument was not being passed in $f14. llvm-svn: 194522
* [mips] Revert part of r194510 that was accidentally committed.Akira Hatanaka2013-11-121-1/+1
| | | | llvm-svn: 194511
* [mips] Fix and re-enable a test case that has been disabled for a long time.Akira Hatanaka2013-11-121-1/+1
| | | | llvm-svn: 194510
* [mips][msa] Enable inlinse assembly for MSA.Daniel Sanders2013-11-122-9/+51
| | | | | | | | | | | | | | Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier: asm ("ldi.w %w0, 1", "=f"(result)); Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended output. This is a consequence of differences in the internal handling of the registers in each compiler. To be source-compatible between the compilers, users must use the 'w' print-modifier. MSA registers (including control registers) are supported in clobber lists. llvm-svn: 194476
* [mips][msa] Fix buildbot failures caused by an unused variable when ↵Daniel Sanders2013-11-121-2/+1
| | | | | | assertions are disabled. llvm-svn: 194472
* [mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. ↵Daniel Sanders2013-11-129-38/+161
| | | | | | not intrinsics) llvm-svn: 194471
* [mips][msa] Added support for matching bset, bseti, bneg, and bnegi from ↵Daniel Sanders2013-11-122-70/+216
| | | | | | normal IR (i.e. not intrinsics) llvm-svn: 194469
* Change the default branch instruction to be the 16 bit variety for mips16.Reed Kotler2013-11-123-5/+26
| | | | | | | | | | | This has no material effect at this time since we don't have a direct object emitter for mips16 and the assembler can't tell them apart. I place a comment "16 bit inst" for those so that I can tell them apart in the output. The constant island pass has only been minimally changed to allow this. More complete branch work is forthcoming but this is the first step. llvm-svn: 194442
* [mips] Partially revert r193641. Stack alignment should not be determined byAkira Hatanaka2013-11-111-1/+1
| | | | | | | the floating point register mode. llvm-svn: 194423
* Mostly finish up constant islands port for Mips for load constants.Reed Kotler2013-11-101-3/+20
| | | | | | | Still need to finish the branch part. Still lots more review of the code, clean up and testing. llvm-svn: 194337
* [mips] Make sure there is a chain edge dependency between loads that readAkira Hatanaka2013-11-091-3/+5
| | | | | | | | | formal arguments on the stack and stores created afterwards. We need this to ensure tail call optimized function calls do not write over the argument area of the stack before it is read out. llvm-svn: 194309
* [mips][msa] Update encoding of LDI instruction.Matheus Almeida2013-11-081-4/+4
| | | | | | The encoding was updated in MSA r1.07. llvm-svn: 194255
* Support for microMIPS trap instructions 1.Zoran Jovanovic2013-11-074-8/+32
| | | | llvm-svn: 194205
* Disable some code that is causing some warnings. It's in the processReed Kotler2013-11-071-3/+2
| | | | | | | | of being converted and this path is not relevant to anything at this time so I have just disabled it for a few days while I'm at the LLVM conference and don't have time to complete it or properly fix it. llvm-svn: 194201
* Implement gpword directive for mips, test case added. Stype changes using ↵Vladimir Medic2013-11-061-299/+313
| | | | | | clang-format are also included. llvm-svn: 194145
* Fix definition for Mips16 pc relative load word instructions.Reed Kotler2013-11-061-5/+3
| | | | llvm-svn: 194126
* Get rid of current calculation function and adjustment schemeReed Kotler2013-11-051-76/+13
| | | | | | from MipsConstantIslands. llvm-svn: 194108
* Get rid of all references to soimm in MipsConstantIslands pass becauseReed Kotler2013-11-051-12/+7
| | | | | | | | | | | we don't have such an operand. Suprisingly enough, this is never actually accounted for in the ARM version when determining offset ranges. In both places there is the comment: - // FIXME: Make use full range of soimm values. (soimm = shift operand immediate). llvm-svn: 194101
* Cleanup getUserOffset. Issues related to inline assembler length andReed Kotler2013-11-051-16/+1
| | | | | | alignment will be handled differently than in ARM constant islands. llvm-svn: 194096
* Remove the word "thumb" from comments. Remove also an incorrectReed Kotler2013-11-051-24/+6
| | | | | | command regarding the porting from the ARM version (was an old comment). llvm-svn: 194066
* Fix r194019 as requested by Eric Christopher.Reed Kotler2013-11-052-13/+1380
| | | | | | | | | | | | | | | | | | | | | Submit the basic port of the rest of ARM constant islands code to Mips. Two test cases are added which reflect the next level of functionality: constants getting moved to water areas that are out of range from the initial placement at the end of the function and basic blocks being split to create water when none exists that can be used. There is a bunch of this code that is not complete and has been marked with IN_PROGRESS. I will finish cleaning this all up during the next week or two and submit the rest of the test cases. I have elminated some code for dealing with inline assembly because to me it unecessarily complicates things and some of the newer features of llvm like function attributies and builtin assembler give me better tools to solve the alignment issues created there. Also, for Mips16 I even have the option of not doing constant islands in the present of inline assembler if I chose. When everything has been completed I will summarize the port and notify people that are knowledgable regarding the ARM Constant Islands code so they can review it in it's entirety if they wish. llvm-svn: 194053
* Revert r194019 to r194021, "Submit the basic port of the rest of ARM ↵NAKAMURA Takumi2013-11-042-1499/+12
| | | | | | | | constant islands code to Mips." It broke -Asserts build. llvm-svn: 194026
* Make sure we don't get a warning from this variable that is only usedReed Kotler2013-11-041-0/+1
| | | | | | when compiling with DEBUG. llvm-svn: 194021
* Submit the basic port of the rest of ARM constant islands code to Mips. Reed Kotler2013-11-042-12/+1498
| | | | | | | | | | | | | | | | | Two test cases are added which reflect the next level of functionality: constants getting moved to water areas that are out of range from the initial placement at the end of the function and basic blocks being split to create water when none exists that can be used. There is a bunch of this code that is not complete and has been marked with IN_PROGRESS. I will finish cleaning this all up during the next week or two and submit the rest of the test cases. I have elminated some code for dealing with inline assembly because to me it unecessarily complicates things and some of the newer features of llvm like function attributies and builtin assembler give me better tools to solve the alignment issues created there. Also, for Mips16 I even have the option of not doing constant islands in the present of inline assembler if I chose. llvm-svn: 194019
* Support for microMIPS branch instructions.Zoran Jovanovic2013-11-0411-26/+158
| | | | llvm-svn: 193992
* Add #include of raw_ostream.h to MipsSEISelLowering.cppHans Wennborg2013-10-301-0/+1
| | | | | | | | Fixing this Windows build error: ..\lib\Target\Mips\MipsSEISelLowering.cpp(997) : error C2027: use of undefined type 'llvm::raw_ostream' llvm-svn: 193696
* [mips][msa] Correct definition of bins[lr] and CHECK-DAG-ize related testsDaniel Sanders2013-10-301-8/+29
| | | | llvm-svn: 193695
* [mips][msa] Added support for matching bmnz, bmnzi, bmz, and bmzi from ↵Daniel Sanders2013-10-303-10/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | normal IR (i.e. not intrinsics) Also corrected the definition of the intrinsics for these instructions (the result register is also the first operand), and added intrinsics for bsel and bseli to clang (they already existed in the backend). These four operations are mostly equivalent to bsel, and bseli (the difference is which operand is tied to the result). As a result some of the tests changed as described below. bitwise.ll: - bsel.v test adapted so that the mask is unknown at compile-time. This stops it emitting bmnzi.b instead of the intended bsel.v. - The bseli.b test now tests the right thing. Namely the case when one of the values is an uimm8, rather than when the condition is a uimm8 (which is covered by bmnzi.b) compare.ll: - bsel.v tests now (correctly) emits bmnz.v instead of bsel.v because this is the same operation (see MSA.txt). i8.ll - CHECK-DAG-ized test. - bmzi.b test now (correctly) emits equivalent bmnzi.b with swapped operands because this is the same operation (see MSA.txt). - bseli.b still emits bseli.b though because the immediate makes it distinguishable from bmnzi.b. vec.ll: - CHECK-DAG-ized test. - bmz.v tests now (correctly) emits bmnz.v with swapped operands (see MSA.txt). - bsel.v tests now (correctly) emits bmnz.v with swapped operands (see MSA.txt). llvm-svn: 193693
* [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. ↵Daniel Sanders2013-10-307-27/+163
| | | | | | | | | | | | | | | | | not intrinsics) This required correcting the definition of the bins[lr]i intrinsics because the result is also the first operand. It also required removing the (arbitrary) check for 32-bit immediates in MipsSEDAGToDAGISel::selectVSplat(). Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d because the constant is legalized into a ConstantPool. Similar things can happen with binsri.d with more than 10 bits set in the mask. The resulting code when this happens is correct but not optimal. llvm-svn: 193687
* [mips][msa] Combine binsri-like DAG of AND and OR into equivalent VSELECTDaniel Sanders2013-10-301-0/+108
| | | | | | | | | | | | | | | (or (and $a, $mask), (and $b, $inverse_mask)) => (vselect $mask, $a, $b). where $mask is a constant splat. This allows bitwise operations to make use of bsel. It's also a stepping stone towards matching bins[lr], and bins[lr]i from normal IR. Two sets of similar tests have been added in this commit. The bsel_* functions test the case where binsri cannot be used. The binsr_*_i functions will start to use the binsri instruction in the next commit. llvm-svn: 193682
* [mips] MipsSETargetLowering now reports DAGCombiner changes when using ↵Daniel Sanders2013-10-301-1/+9
| | | | | | | | -debug-only=mips-isel No test since -debug output is intended for developers and not end-users. llvm-svn: 193681
* [mips][msa] Added support for matching splat.[bhw] from normal IR (i.e. not ↵Daniel Sanders2013-10-303-26/+57
| | | | | | | | | | intrinsics) splat.d is implemented but this subtest is currently disabled. This is because it is difficult to match the appropriate IR on MIPS32. There is a patch under review that should help with this so I hope to enable the subtest soon. llvm-svn: 193680
* [mips] Compute stack alignment on the fly.Akira Hatanaka2013-10-303-7/+3
| | | | llvm-svn: 193673
* [mips] Align the stack to 16-bytes for mfp64.Akira Hatanaka2013-10-295-4/+11
| | | | llvm-svn: 193641
* Add a helper getSymbol to AsmPrinter.Rafael Espindola2013-10-292-2/+2
| | | | llvm-svn: 193627
* Support for microMIPS jump instructionsZoran Jovanovic2013-10-2911-21/+138
| | | | llvm-svn: 193623
* The asm printer has a mangler. Use it.Rafael Espindola2013-10-293-7/+4
| | | | llvm-svn: 193618
* [mips] Simplify LowerFormalArguments using getRegClassFor.Akira Hatanaka2013-10-281-15/+2
| | | | | | No functionality change. llvm-svn: 193540
* Prune utf8 chars in comments.NAKAMURA Takumi2013-10-281-3/+3
| | | | llvm-svn: 193512
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