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* Wrap some long lines in LLVMBuild files. NFCDouglas Katzman2015-06-121-1/+12
| | | | | | | As suggested by jroelofs in a prior review (D9752), it makes sense to generally prefer multi-line format. llvm-svn: 239632
* Replace string GNU Triples with llvm::Triple in TargetMachine. NFC.Daniel Sanders2015-06-112-30/+26
| | | | | | | | | | | | | | | | | | Summary: For the moment, TargetMachine::getTargetTriple() still returns a StringRef. This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rengolin Reviewed By: rengolin Subscribers: ted, llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10362 llvm-svn: 239554
* [CodeGen] ArrayRef'ize cond/pred in various TII APIs. NFC.Ahmed Bougacha2015-06-112-6/+4
| | | | llvm-svn: 239553
* Replace string GNU Triples with llvm::Triple in computeDataLayout(). NFC.Daniel Sanders2015-06-111-5/+5
| | | | | | | | | | | | | | | | Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rengolin Reviewed By: rengolin Subscribers: llvm-commits, jfb, rengolin Differential Revision: http://reviews.llvm.org/D10361 llvm-svn: 239538
* Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate ↵Toma Tabacu2015-06-113-2/+72
| | | | | | | | | operand." (r239396). Apparently, Arcanist didn't include some of my local changes in my previous commit attempt. llvm-svn: 239523
* [mips][microMIPS] Implement ERET and ERETNC instructionsZoran Jovanovic2015-06-113-0/+29
| | | | | | http://reviews.llvm.org/D10091 llvm-svn: 239522
* [mips] Change existing uimm10 operand to restrict the accepted immediatesZoran Jovanovic2015-06-112-0/+11
| | | | | | http://reviews.llvm.org/D10312 llvm-svn: 239520
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and ↵Daniel Sanders2015-06-106-20/+21
| | | | | | | | | | | | | | | | | | create*MCSubtargetInfo(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rafael Reviewed By: rafael Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10311 llvm-svn: 239467
* Replace string GNU Triples with llvm::Triple in MCAsmBackend subclasses and ↵Daniel Sanders2015-06-102-24/+20
| | | | | | | | | | | | | | | | | | create*AsmBackend(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: echristo, rafael Reviewed By: rafael Subscribers: rafael, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10243 llvm-svn: 239464
* Recommit "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).Toma Tabacu2015-06-091-11/+15
| | | | | | | Specified the llvm namespace for the 2 calls to make_unique() which caused compilation errors in Visual Studio 2013. llvm-svn: 239405
* Revert "[mips] [IAS] Add support for BNE and BEQ with an immediate operand." ↵Toma Tabacu2015-06-092-61/+2
| | | | | | | | (r239396). It was breaking buildbots. llvm-svn: 239397
* [mips] [IAS] Add support for BNE and BEQ with an immediate operand.Toma Tabacu2015-06-092-2/+61
| | | | | | | | | | | | | | | | Summary: For some branches, GAS accepts an immediate instead of the 2nd register operand. We only implement this for BNE and BEQ for now. Other branch instructions can be added later, if needed. Reviewers: dsanders Reviewed By: dsanders Subscribers: seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9666 llvm-svn: 239396
* MC: Add target hook to control symbol quotingMatt Arsenault2015-06-094-9/+10
| | | | llvm-svn: 239370
* Revert "[mips] [IAS] Restore STI.FeatureBits in .set pop." (r239144).Toma Tabacu2015-06-051-15/+11
| | | | | | This is breaking the Windows buildbots. llvm-svn: 239145
* [mips] [IAS] Restore STI.FeatureBits in .set pop.Toma Tabacu2015-06-051-11/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Only restoring AvailableFeatures is not enough and will lead to buggy behaviour. For example, if we have a feature enabled and we ".set pop", the next time we try to ".set" that feature nothing will happen because the "!(STI.getFeatureBits()[Feature])" check will be false, because we didn't restore STI.FeatureBits. In order to fix this, we need to make MipsAssemblerOptions remember the STI.FeatureBits instead of the AvailableFeatures and then regenerate AvailableFeatures each time we ".set pop". This is because, AFAIK, there is no way to convert from AvailableFeatures back to STI.FeatureBits, but the reverse is possible by using ComputeAvailableFeatures(STI.FeatureBits). I also moved the updating of AssemblerOptions inside the "if" statement in setFeatureBits() and clearFeatureBits(), as there is no reason to update if nothing changes. Reviewers: dsanders, mkuper Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9156 llvm-svn: 239144
* Replace string GNU Triples with llvm::Triple in MCAsmInfo subclasses and ↵Daniel Sanders2015-06-043-5/+5
| | | | | | | | | | | | | | | | | | | | create*AsmInfo(). NFC. Summary: This is the first of several patches to eliminate StringRef forms of GNU triples from the internals of LLVM. After this is complete, GNU triples will be replaced by a more authoratitive representation in the form of an LLVM TargetTuple. Reviewers: rengolin Reviewed By: rengolin Subscribers: ted, llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10236 llvm-svn: 239036
* Bring back r239006 with a fix.Rafael Espindola2015-06-043-14/+5
| | | | | | | | | | | | | | | | | | | The fix is just that getOther had not been updated for packing the st_other values in fewer bits and could return spurious values: - unsigned Other = (getFlags() & (0x3f << ELF_STO_Shift)) >> ELF_STO_Shift; + unsigned Other = (getFlags() & (0x7 << ELF_STO_Shift)) >> ELF_STO_Shift; Original message: Pack the MCSymbolELF bit fields into MCSymbol's Flags. This reduces MCSymolfELF from 64 bytes to 56 bytes on x86_64. While at it, also make getOther/setOther easier to use by accepting unshifted STO_* values. llvm-svn: 239012
* Revert "Pack the MCSymbolELF bit fields into MCSymbol's Flags."Rafael Espindola2015-06-043-5/+14
| | | | | | | | This reverts commit r239006. I am debugging the powerpc failures. llvm-svn: 239010
* Pack the MCSymbolELF bit fields into MCSymbol's Flags.Rafael Espindola2015-06-043-14/+5
| | | | | | | | | This reduces MCSymolfELF from 64 bytes to 56 bytes on x86_64. While at it, also make getOther/setOther easier to use by accepting unshifted STO_* values. llvm-svn: 239006
* Remove getOrCreateSymbolData. There is no MCSymbolData anymore.Rafael Espindola2015-06-032-2/+2
| | | | llvm-svn: 238952
* Merge MCELF.h into MCSymbolELF.h.Rafael Espindola2015-06-023-17/+18
| | | | | | | Now that we have a dedicated type for ELF symbol, these helper functions can become member function of MCSymbolELF. llvm-svn: 238864
* [mips] Add support for dynamic stack realignment.Vasileios Kalintiris2015-06-028-8/+141
| | | | | | | | | | | | | | | | | | | | Summary: With this change we are able to realign the stack dynamically, whenever it contains objects with alignment requirements that are larger than the alignment specified from the given ABI. We have to use the $fp register as the frame pointer when we perform dynamic stack realignment. In complex stack frames, with variably-sized objects, we reserve additionally the callee-saved register $s7 as the base pointer in order to reference locals. Reviewers: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8633 llvm-svn: 238829
* [mips] [IAS] Add support for the .set softfloat/hardfloat directives.Toma Tabacu2015-06-023-0/+48
| | | | | | | | | | | | | | Summary: These directives are used to set the current value of the SoftFloat feature. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D9074 llvm-svn: 238813
* Create a MCSymbolELF.Rafael Espindola2015-06-021-3/+4
| | | | | | | | | This create a MCSymbolELF class and moves SymbolSize since only ELF needs a size expression. This reduces the size of MCSymbol from 56 to 48 bytes. llvm-svn: 238801
* [mips][FastISel] Implement bswap.Vasileios Kalintiris2015-06-011-0/+64
| | | | | | | | | | | | | | | | | | Summary: Implement bswap intrinsic for MIPS FastISel. It's very different for misp32 r1/r2 . Based on a patch by Reed Kotler. Test Plan: bswap1.ll test-suite Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7219 llvm-svn: 238760
* [mips][FastISel] Implement intrinsics memset, memcopy & memmove.Vasileios Kalintiris2015-06-011-7/+89
| | | | | | | | | | | | | | | | | | | | Summary: Implement the intrinsics memset, memcopy and memmove in MIPS FastISel. Make some needed infrastructure fixes so that this can work. Based on a patch by Reed Kotler. Test Plan: memtest1.ll The patch passes test-suite for mips32 r1/r2 and at O0/O2 Reviewers: rkotler, dsanders Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7158 llvm-svn: 238759
* [mips][FastISel] Implement srem/urem and sdiv/udiv instructions.Vasileios Kalintiris2015-06-011-0/+61
| | | | | | | | | | | | | | | | | | | Summary: Implement the LLVM assembly urem/srem and sdiv/udiv instructions in MIPS FastISel. Based on a patch by Reed Kotler. Test Plan: srem1.ll div1.ll test-suite at O0/O2 for mips32 r1/r2 Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D7028 llvm-svn: 238757
* [mips][FastISel] Implement the select statement for MIPS FastISel.Vasileios Kalintiris2015-06-011-0/+47
| | | | | | | | | | | | | | | | | | Summary: Implement the LLVM IR select statement for MIPS FastISelsel. Based on a patch by Reed Kotler. Test Plan: "Make check" test included now. Passes test-suite at O2/O0 mips32 r1/r2. Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D6774 llvm-svn: 238756
* [mips][FastISel] Clobber HI0/LO0 registers in MUL instructions.Vasileios Kalintiris2015-06-011-0/+33
| | | | | | | | | | | | | | | | | | | | | Summary: The contents of the HI/LO registers are unpredictable after the execution of the MUL instruction. In addition to implicitly defining these registers in the MUL instruction definition, we have to mark those registers as dead too. Without this the fast register allocator is running out of registers when the MUL instruction is followed by another one that tries to allocate the AC0 register. Based on a patch by Reed Kotler. Reviewers: dsanders, rkotler Subscribers: llvm-commits, rfuhler Differential Revision: http://reviews.llvm.org/D9825 llvm-svn: 238755
* Fix relocation selection for foo-. on mips.Rafael Espindola2015-06-011-1/+1
| | | | | | This handles only the 32 bit case. llvm-svn: 238751
* Simplify code, NFC.Rafael Espindola2015-06-011-107/+60
| | | | llvm-svn: 238750
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-012-2/+4
| | | | | | | | | | This is important because of different addressing modes depending on the address space for GPU targets. This only adds the argument, and does not update any of the uses to provide the correct address space. llvm-svn: 238723
* MC: Clean up MCExpr naming. NFC.Jim Grosbach2015-05-307-48/+48
| | | | llvm-svn: 238634
* Rename getOrCreateSymbolData to registerSymbol and return void.Rafael Espindola2015-05-291-1/+1
| | | | | | Another step in merging MCSymbol and MCSymbolData. llvm-svn: 238607
* Pass MCSymbols to the helper functions in MCELF.h.Rafael Espindola2015-05-293-13/+9
| | | | llvm-svn: 238596
* Pass a MCSymbol to needsRelocateWithSymbol.Rafael Espindola2015-05-291-5/+4
| | | | llvm-svn: 238589
* [mips] Remove 2 unused variables in MipsTargetStreamer.cpp. NFC.Toma Tabacu2015-05-291-2/+0
| | | | llvm-svn: 238554
* Remove a trivial forwarding function. NFC.Rafael Espindola2015-05-281-1/+1
| | | | llvm-svn: 238506
* [mips] Add new format for dmtc2/dmfc2 for Octeon CPUs.Kai Nacke2015-05-283-2/+34
| | | | | | | | | | | | | Octeon CPUs use dmtc2 rt,imm16 and dmfcp2 rt,imm16 for the crypto coprocessor. E.g. dmtc2 rt,0x4057 starts calculation of sha-1. I had to introduce a new deconding namespace to avoid a decoding conflict. Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D10083 llvm-svn: 238439
* [Mips64] Add support for MCJIT for MIPS64r2 and MIPS64r6Petar Jovanovic2015-05-281-2/+2
| | | | | | | | | | Add support for resolving MIPS64r2 and MIPS64r6 relocations in MCJIT. Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D9667 llvm-svn: 238424
* [mips][microMIPSr6] Implement SEB and SEH instructionsZoran Jovanovic2015-05-273-2/+22
| | | | | | Differential Revision: http://reviews.llvm.org/D9739 llvm-svn: 238333
* [mips][microMIPSr6] Implement BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC ↵Jozef Kolek2015-05-273-7/+89
| | | | | | | | | | | and BNEZALC instructions This patch implements microMIPS32r6 BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC and BNEZALC instructions using mapping. Differential Revision: http://reviews.llvm.org/D10031 llvm-svn: 238325
* Use operator<< instead of print in a few more places.Rafael Espindola2015-05-271-2/+2
| | | | llvm-svn: 238315
* Revert r238190 and r238197: [mips] Make TTypeEncoding indirect to allow ↵Daniel Sanders2015-05-272-9/+1
| | | | | | | | | | .eh_frame to be read-only. This broke the llvm-mips-linux builder and several of our out-of-tree builders. Initial investigations show that the commit probably isn't the problem but reverting anyway while I investigate. llvm-svn: 238302
* Replace getOrCreateSectionData with registerSection.Rafael Espindola2015-05-262-7/+7
| | | | | | There is now no SectionData to be created. llvm-svn: 238208
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-264-64/+68
| | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
* [mips] Make TTypeEncoding indirect to allow .eh_frame to be read-only.Daniel Sanders2015-05-262-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Following on from r209907 which made personality encodings indirect, do the same for TType encodings. This fixes the case where a try/catch block needs to generate references to, for example, std::exception in the .gcc_except_table. This commit uses DW_EH_PE_sdata8 for N64 as far as is possible at the moment. However, it is possible to end up with DW_EH_PE_sdata4 when a TargetMachine is not available. There's no risk of issues with inconsistency here since the tables are self describing but it does mean there is a small chance of the PC-relative offset being out of range for particularly large programs. Reviewers: petarj Reviewed By: petarj Subscribers: srhines, joerg, tberghammer, llvm-commits Differential Revision: http://reviews.llvm.org/D9669 llvm-svn: 238190
* [Mips] Prefer Twine::utohexstr over utohexstr, saves a string copy.Benjamin Kramer2015-05-231-3/+2
| | | | | | NFC. llvm-svn: 238103
* [opaque pointer type] Allow gep_type_iterator to work with the pointee type ↵David Blaikie2015-05-211-0/+1
| | | | | | | | | | | from the GEP instruction The raw non-instruction/constant form of this is still relying on being able to access the pointee type from a pointer type - those will be cleaned up later. For now, just focus on the cases where the pointee type is easily accessible. llvm-svn: 237958
* Stop forwarding (get|set)Aligment from MCSectionData to MCSection.Rafael Espindola2015-05-212-16/+17
| | | | llvm-svn: 237956
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