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* Split ExtIns into two base classes and have instructions EXT and INS derive fromAkira Hatanaka2011-12-051-17/+21
| | | | | | them. llvm-svn: 145852
* Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 andAkira Hatanaka2011-12-051-20/+16
| | | | | | O32 with relocation-model=pic too. llvm-svn: 145850
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-023-32/+33
| | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. llvm-svn: 145714
* Change names for MIPS "generic" processors defined in Mips.td to match what GNUAkira Hatanaka2011-11-292-4/+4
| | | | | | | | | | tools use. Patch by Simon Atanasyan. "mips32r1" => "mips32" "4ke" => mips32r2" "mips64r1" => "mips64" llvm-svn: 145451
* build/CMake: Finish removal of add_llvm_library_dependencies.Daniel Dunbar2011-11-294-31/+0
| | | | llvm-svn: 145420
* This patch makes the following changes necessary for MIPS' direct code emission.Akira Hatanaka2011-11-236-55/+236
| | | | | | | | - lower unaligned loads/stores. - encode the size operand of instructions INS and EXT. - emit relocation information needed for JAL (jump-and-link). llvm-svn: 145113
* This patch addresses gp relative fixups/relocations for jump tables.Akira Hatanaka2011-11-231-1/+7
| | | | llvm-svn: 145112
* Lower 64-bit constant pool node.Akira Hatanaka2011-11-161-8/+12
| | | | llvm-svn: 144849
* Lower 64-bit block address.Akira Hatanaka2011-11-161-9/+11
| | | | llvm-svn: 144847
* Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpoolAkira Hatanaka2011-11-162-7/+24
| | | | | | nodes. llvm-svn: 144841
* 64-bit jump register instruction.Akira Hatanaka2011-11-162-6/+7
| | | | llvm-svn: 144840
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-163-29/+35
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bitAkira Hatanaka2011-11-152-18/+24
| | | | | | registers and instructions when ABI is N64. llvm-svn: 144666
* Set nomacro before emitting the sequence of instructions that set global pointerAkira Hatanaka2011-11-151-3/+2
| | | | | | register. llvm-svn: 144665
* Simplify function PassByValArg64.Akira Hatanaka2011-11-151-14/+18
| | | | llvm-svn: 144664
* Delete files.Akira Hatanaka2011-11-152-137/+0
| | | | llvm-svn: 144655
* Remove MipsMCSymbolRefExpr.Akira Hatanaka2011-11-152-2/+0
| | | | llvm-svn: 144654
* Unbreak Release builds.Benjamin Kramer2011-11-141-1/+1
| | | | llvm-svn: 144560
* 32-to-64-bit extended load.Akira Hatanaka2011-11-141-5/+10
| | | | llvm-svn: 144554
* AnalyzeCallOperands function for N32/64.Akira Hatanaka2011-11-142-0/+45
| | | | | | | | N32/64 places all variable arguments in integer registers (or on stack), regardless of their types, but follows calling convention of non-vaarg function when it handles fixed arguments. llvm-svn: 144553
* Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64.Akira Hatanaka2011-11-141-14/+30
| | | | llvm-svn: 144552
* Remove variable that keeps the size of area used to save byval or variableAkira Hatanaka2011-11-143-12/+1
| | | | | | | | | | | argument registers on the callee's stack frame, along with functions that set and get it. It is not necessary to add the size of this area when computing stack size in emitPrologue, since it has already been accounted for in PEI::calculateFrameObjectOffsets. llvm-svn: 144549
* Fix typo.Akira Hatanaka2011-11-121-1/+1
| | | | llvm-svn: 144453
* Implement Mips64's handling of byval arguments in LowerCall.Akira Hatanaka2011-11-121-12/+100
| | | | llvm-svn: 144452
* Implement Mips64's handling of byval arguments in LowerFormalArguments.Akira Hatanaka2011-11-121-18/+60
| | | | llvm-svn: 144449
* 64-bit arbitrary immediate pattern.Akira Hatanaka2011-11-121-0/+4
| | | | llvm-svn: 144448
* Function for handling byval arguments.Akira Hatanaka2011-11-122-4/+43
| | | | llvm-svn: 144447
* build: Attempt to rectify inconsistencies between CMake and LLVMBuild ↵Daniel Dunbar2011-11-121-1/+1
| | | | | | | | versions of explicit dependencies. - The hope is that we have a tool/test to verify these are accurate (and tight) soon. llvm-svn: 144444
* CMake: Fix CMake build for new Mips tblgen file.Daniel Dunbar2011-11-111-0/+1
| | | | llvm-svn: 144423
* Mips MC object code emission improvements:Bruno Cardoso Lopes2011-11-1113-130/+475
| | | | | | | | | | "With this patch we can now generate runnable Mips code through LLVM direct object emission. We have run numerous simple programs, both C and C++ and with -O0 and -O3 from the output. The code is not production ready, but quite useful for experimentation." Patch and message by Jack Carter llvm-svn: 144414
* Do not try to detect DAG combine patterns for integer multiply-add/sub if valueAkira Hatanaka2011-11-111-2/+4
| | | | | | | type is not i32. MIPS does not have 64-bit integer multiply-add/sub instructions. llvm-svn: 144373
* 64-bit atomic instructions.Akira Hatanaka2011-11-113-64/+194
| | | | llvm-svn: 144372
* Modify LowerFRAMEADDR. Use 64-bit register FP_64 when ABI is N64.Akira Hatanaka2011-11-111-1/+2
| | | | llvm-svn: 144371
* Add 64-bit versions of LEA_ADDiu and DynAlloc. Modify LowerDYNAMIC_STACKALLOC.Akira Hatanaka2011-11-113-12/+27
| | | | llvm-svn: 144370
* 64-bit versions of jal, jalr and bal.Akira Hatanaka2011-11-112-0/+27
| | | | llvm-svn: 144368
* Emit Mips64's sequence of instructions that set global register in prologue.Akira Hatanaka2011-11-111-1/+21
| | | | llvm-svn: 144367
* Fix printing of MCSymbolRegExpr. Needs three closing parentheses forAkira Hatanaka2011-11-111-1/+4
| | | | | | VK_Mips_GPOFF_HI/LO. llvm-svn: 144366
* LLVMBuild: Add explicit information on whether targets define an assembly ↵Daniel Dunbar2011-11-111-0/+1
| | | | | | printer, assembly parser, or disassembler. llvm-svn: 144344
* llvm-build: Add --native-target and --enable-targets options, and add logic toDaniel Dunbar2011-11-101-1/+0
| | | | | | | | | | handle defining the "magic" target related components (like native, nativecodegen, and engine). - We still require these components to be in the project (currently in lib/Target) so that we have a place to document them and hopefully make it more obvious that they are "magic". llvm-svn: 144253
* llvm-build: Add an explicit component type to represent targets.Daniel Dunbar2011-11-101-1/+2
| | | | | | - Gives us a place to hang target specific metadata (like whether the target has a JIT). llvm-svn: 144250
* Properly handle Mips MC relocations and lower cpload and cprestore macros to ↵Bruno Cardoso Lopes2011-11-084-45/+191
| | | | | | | | MCInsts. Patch by Jack Carter. llvm-svn: 144139
* Added invariant field to the DAG.getLoad method and changed all calls.Pete Cooper2011-11-081-9/+9
| | | | | | When this field is true it means that the load is from constant (runt-time or compile-time) and so can be hoisted from loops or moved around other memory accesses llvm-svn: 144100
* This patch handles unaligned loads and stores in Mips JIT. Mips backendBruno Cardoso Lopes2011-11-082-6/+148
| | | | | | | | | | | | implements unaligned loads and stores with assembler macro-instructions ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions instead of these macros. Since each unaligned load/store is expanded into two corresponding loads/stores where offset for second load/store is modified by +3 (for words) or +1 (for halfwords). Patch by Petar Jovanovic and Sasa Stankovic. llvm-svn: 144081
* Various Mips64 floating point instruction patterns.Akira Hatanaka2011-11-071-3/+18
| | | | llvm-svn: 144019
* Add definition of the base class for floating point comparison instructionsAkira Hatanaka2011-11-071-8/+8
| | | | | | and add Mips64's version too. llvm-svn: 144018
* Add code needed for copying between 64-bit integer and floating pointerAkira Hatanaka2011-11-071-0/+6
| | | | | | registers. llvm-svn: 144017
* Add definitions of 64-bit instructions which move data between integer andAkira Hatanaka2011-11-071-0/+8
| | | | | | floating pointer registers. llvm-svn: 144016
* Add definition of 64-bit load upper immediate.Akira Hatanaka2011-11-072-3/+4
| | | | llvm-svn: 143994
* Include RegSaveAreaSize in the computation of stack size.Akira Hatanaka2011-11-071-0/+1
| | | | llvm-svn: 143993
* Define functions that get or set the size of area on callee's stack frame whichAkira Hatanaka2011-11-071-1/+10
| | | | | | is used to save va_arg or byval arguments passed in registers. llvm-svn: 143992
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