summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips
Commit message (Collapse)AuthorAgeFilesLines
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-3/+3
| | | | | | | | | | | | | Change TargetInstrInfo API to take `MachineInstr&` instead of `MachineInstr*` in the functions related to predicated instructions (I'll try to come back later and get some of the rest). All of these functions require non-null parameters already, so references are more clear. As a bonus, this happens to factor away a host of implicit iterator => pointer conversions. No functionality change intended. llvm-svn: 261605
* Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC"Duncan P. N. Exon Smith2016-02-221-2/+3
| | | | | | | | | | This reverts commit r261504, since it's not obvious the new name is better: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160222/334298.html I'll recommit if we get consensus that it's the right direction. llvm-svn: 261567
* [mips] added support for trunc macroZoran Jovanovic2016-02-222-0/+64
| | | | | | | | Author: obucina Reviewers: dsanders Differential Revision: http://reviews.llvm.org/D15745 llvm-svn: 261529
* CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFCDuncan P. N. Exon Smith2016-02-211-3/+2
| | | | | | | | | | | | | | | | | | | | | | | Delete MachineInstr::getIterator(), since the term "iterator" is overloaded when talking about MachineInstr. - Downcast to ilist_node in iplist::getNextNode() and getPrevNode() so that ilist_node::getIterator() is still available. - Add it back as MachineInstr::getInstrIterator(). This matches the naming in MachineBasicBlock. - Add MachineInstr::getBundleIterator(). This is explicitly called "bundle" (not matching MachineBasicBlock) to disintinguish it clearly from ilist_node::getIterator(). - Update all calls. Some of these I switched to `auto` to remove boiler-plate, since the new name is clear about the type. There was one call I updated that looked fishy, but it wasn't clear what the right answer was. This was in X86FrameLowering::inlineStackProbe(), added in r252578 in lib/Target/X86/X86FrameLowering.cpp. I opted to leave the behaviour unchanged, but I'll reply to the original commit on the list in a moment. llvm-svn: 261504
* Unbreak non-X86 targets from fallout caused by r261462David Majnemer2016-02-212-4/+7
| | | | llvm-svn: 261463
* [mips][microMIPS] Implement TLBINV and TLBINVF instructionsZlatko Buljan2016-02-183-2/+30
| | | | | | Differential Revision: http://reviews.llvm.org/D16849 llvm-svn: 261211
* [mips] Removed the SHF_ALLOC flag and the SHT_REL flag from the .pdr section.Scott Egerton2016-02-171-2/+1
| | | | | | | | | | | | This section is used for debug information and has no need to be in memory at runtime. This patch also fixes an error when compiling the Linux kernel. The error is that there are relocations within the .pdr section in a VDSO. SHT_REL was removed as it is a section type and not a section flag, therefore it does not make sense for it to be there. With this patch, LLVM now emits the same flags as the GNU assembler. llvm-svn: 261083
* [mips] Implemented the .hword directive.Scott Egerton2016-02-152-0/+6
| | | | | | | | | | | | | | Summary: In order to pass the tests, this required marking R_MIPS_16 relocations as needing to point to the symbol and not the section. Reviewers: vkalintiris, dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D17200 llvm-svn: 260896
* Reverted r260879 as it caused test failures in lld.Scott Egerton2016-02-151-1/+1
| | | | llvm-svn: 260880
* [mips] Removed the SHF_ALLOC flag from the .pdr section.Scott Egerton2016-02-151-1/+1
| | | | | | | | | | | | | | | | | Summary: This section is used for debug information and has no need to be in memory at runtime. With this patch, LLVM now emits the same flags as the GNU assembler. This patch also fixes an error when compiling the Linux kernel, The error is that there are relocations within the .pdr section in a VDSO. Reviewers: vkalintiris, dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D17199 llvm-svn: 260879
* [MC][ELF] Handle MIPS specific .sdata and .sbss directivesSimon Atanasyan2016-02-111-0/+26
| | | | | | | | | MIPS specific .sdata and .sbss directives create corresponding sections with proper initialized ELF flags including ELF::SHF_MIPS_GPREL. Differential Revision: http://reviews.llvm.org/D17001 llvm-svn: 260498
* [CodeGen] Prefer "if (SDValue R = ...)" to "if (R.getNode())". NFCI.Ahmed Bougacha2016-02-091-14/+8
| | | | llvm-svn: 260316
* [mips] Extend MipsAsmParser class to handle %got(sym + const) expressionsSimon Atanasyan2016-02-091-0/+1
| | | | | | | | | Now the parser supports `%got(sym)` expressions only but `%got(sym + const)` variant is also valid and accepted by GAS. Differential Revision: http://reviews.llvm.org/D16885 llvm-svn: 260305
* [mips] Remove redundant inclusions of MipsAnalyzeImmediate.hDaniel Sanders2016-02-039-8/+1
| | | | llvm-svn: 259655
* [mips] Add SHF_MIPS_GPREL flag to the MIPS .sbss and .sdata sectionsSimon Atanasyan2016-02-031-2/+4
| | | | | | | | | | MIPS ABI states that .sbss and .sdata sections must have SHF_MIPS_GPREL flag. See Figure 4–7 on page 69 in the following document: ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf. Differential Revision: http://reviews.llvm.org/D15740 llvm-svn: 259641
* [mips] Range check uimm16 and fix several bugs this revealed.Daniel Sanders2016-02-017-56/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: The bugs were: * teq and similar take 4-bit unsigned immediates on microMIPS. * teqi and similar have side-effects like teq do. * shll_s.w and shra_r.w take 5-bit unsigned immediates. * The various DSP ext* instructions take a 5-bit immediate. * repl.qh takes an 8-bit unsigned immediate. * repl.ph takes a 10-bit unsigned immediate. * rddsp/wrdsp take a 10-bit unsigned immediate. * teqi and similar take signed 16-bit immediates (10-bit for microMIPS). * Out-of-range immediate macros for or/xor take a simm32/simm64 depending on architecture. I'll fix the simm64 case properly when I reach simm32. lui is a bit more lenient than GAS and accepts signed immediates in addition to unsigned. This is because MipsMCExpr can produce signed values when constant folding and it currently lacks a way of knowing it should fold to an unsigned value. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15446 llvm-svn: 259360
* [mips] Absolute value macro expansionZoran Jovanovic2016-01-292-0/+25
| | | | | | | | Author: obucina Reviewers: dsanders Differential Revision: http://reviews.llvm.org/D16323 llvm-svn: 259202
* [mips][microMIPS] Disable FastISel for microMIPSZoran Jovanovic2016-01-281-1/+2
| | | | | | | | | | | Author: milena.vujosevic.janicic Reviewers: dsanders FastIsel is not supported for microMIPS, thus it needs to be disabled. Test micromips-zero-mat-uses.ll is deleted since the tested sequence of instructions is not generated for microMIPS without FastISel. Differential Revision: http://reviews.llvm.org/D15892 llvm-svn: 259039
* Rename TargetSelectionDAGInfo into SelectionDAGTargetInfo and move it to ↵Benjamin Kramer2016-01-271-3/+3
| | | | | | | | CodeGen/ It's a SelectionDAG thing, not a Target thing. llvm-svn: 258939
* Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs.Benjamin Kramer2016-01-271-1/+1
| | | | llvm-svn: 258917
* Remove autoconf supportChris Bieneman2016-01-266-104/+0
| | | | | | | | | | | | | | | | Summary: This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html "I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened." - Obi Wan Kenobi Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16471 llvm-svn: 258861
* Reflect the MC/MCDisassembler split on the include/ level.Benjamin Kramer2016-01-261-1/+1
| | | | | | No functional change, just moving code around. llvm-svn: 258818
* [mips] Allowed dla instructions on 32-bit architectures.Scott Egerton2016-01-211-5/+15
| | | | | | | | | | | | | | | Summary: This is now the same as the behaviour of the GNU assembler. This was done as it is required in order to build the Linux kernel with the integrated assembler enabled. Reviewers: dsanders, vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13594 llvm-svn: 258400
* [MC, COFF] Add .reloc support for WinCOFFDavid Majnemer2016-01-192-11/+6
| | | | | | | This adds rudimentary support for a few relocations that we will use for the CodeView debug format. llvm-svn: 258216
* [opaque pointer types] [NFC] CallSite: use getFunctionType() instead of ↵Manuel Jacob2016-01-171-8/+2
| | | | | | | | | | | | | | going through PointerType::getElementType. Patch by Eduard Burtescu. Reviewers: dblaikie, mjacob Subscribers: dsanders, llvm-commits, dblaikie Differential Revision: http://reviews.llvm.org/D16273 llvm-svn: 258023
* GlobalValue: use getValueType() instead of getType()->getPointerElementType().Manuel Jacob2016-01-161-1/+1
| | | | | | | | | | | | Reviewers: mjacob Subscribers: jholewinski, arsenm, dsanders, dblaikie Patch by Eduard Burtescu. Differential Revision: http://reviews.llvm.org/D16260 llvm-svn: 257999
* Update to use new name alignTo().Rui Ueyama2016-01-143-14/+13
| | | | llvm-svn: 257804
* Handle offsets larger than 32 bits.Rafael Espindola2016-01-141-2/+4
| | | | | | | David Majnemer noticed that it was not obvious what the behavior would be if B.Offset - A.Offset could not fit in an int. llvm-svn: 257803
* Assert that a cmp function defines a total order.Rafael Espindola2016-01-141-3/+2
| | | | | | Thanks to David Blaikie for noticing it. llvm-svn: 257796
* Convert a few assert failures into proper errors.Rafael Espindola2016-01-131-3/+4
| | | | | | Fixes PR25944. llvm-svn: 257697
* [mips] Correct operand order in DSP's mthi/mtloDaniel Sanders2016-01-121-2/+3
| | | | | | | | | | | | Summary: The result register is the second operand as per the other mt* instructions. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D15993 llvm-svn: 257478
* Mips: Remove lowerSELECT_CCMatt Arsenault2016-01-112-18/+2
| | | | | | This is the same as the default expansion. llvm-svn: 257346
* [mips] Never select JAL for calls to an absolute immediate address.Daniel Sanders2016-01-111-3/+1
| | | | | | | | | | | | | | | Summary: It actually takes an offset into the current PC-region. This fixes the 'expr' command in lldb. Reviewers: vkalintiris, jaydeep, bhushan Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D16054 llvm-svn: 257339
* [TableGen] Remove MnemonicContainsDot from AsmParser. It isn't used. NFCCraig Topper2015-12-291-1/+0
| | | | llvm-svn: 256542
* Remove extra forward declarations and scrub includes for all in tree ↵Craig Topper2015-12-251-2/+0
| | | | | | InstPrinters. NFC llvm-svn: 256427
* [mips][microMIPS] Implement DERET and DI instructions and check size operand ↵Zlatko Buljan2015-12-2110-60/+74
| | | | | | | | for EXT and DEXT* instructions Differential Revision: http://reviews.llvm.org/D15570 llvm-svn: 256152
* [mips][microMIPS][DSP] Implement PACKRL.PH, PICK.PH, PICK.QB, SHILO, SHILOV ↵Zlatko Buljan2015-12-186-67/+156
| | | | | | | | and WRDSP instructions Differential Revision: http://reviews.llvm.org/D14429 llvm-svn: 255991
* Avoid explicit relocation sorting most of the time.Rafael Espindola2015-12-171-0/+14
| | | | | | | | | | These days relocations are created and stored in a deterministic way. The order they are created is also suitable for the .o file, so we don't need an explicit sort. The last remaining exception is MIPS. llvm-svn: 255902
* Always sort by offset first. NFC.Rafael Espindola2015-12-171-3/+0
| | | | | | | Every target changing sortRelocs was first calling the parent implementation. Just run that first. llvm-svn: 255898
* Normalize MBB's successors' probabilities in several locations.Cong Hou2015-12-131-1/+1
| | | | | | | | | | | | This patch adds some missing calls to MBB::normalizeSuccProbs() in several locations where it should be called. Those places are found by checking if the sum of successors' probabilities is approximate one in MachineBlockPlacement pass with some instrumented code (not in this patch). Differential revision: http://reviews.llvm.org/D15259 llvm-svn: 255455
* [mips][ias] Range check uimm10 operandsDaniel Sanders2015-12-092-13/+7
| | | | | | | | | | | | Summary: Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D15229 llvm-svn: 255112
* [mips] Use multiclass patterns for f32/f64 comparisons and i32 selects.Vasileios Kalintiris2015-12-091-75/+69
| | | | | | | | | | | | | | | Summary: Although the multiclass for i32 selects might seem redundant as it has only one instantiation, we will use it to replace the correspondent patterns in Mips64r6InstrInfo.td in follow-up commits. Reviewers: dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D14612 llvm-svn: 255110
* Revert r254897 "[mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions"Zlatko Buljan2015-12-092-37/+10
| | | | | | | | | Commited patch was intended to implement LH, LHE, LHU and LHUE instructions. After commit test-suite failed with error message in the form of: fatal error: error in backend: Cannot select: t124: i32,ch = load<LD2[%d](tbaa=<0x94acc48>), sext from i16> t0, t2, undef:i32 For that reason I decided to revert commit r254897 and make new patch which besides implementation and standard regression tests will also have dedicated tests (CodeGen) for the above error. llvm-svn: 255109
* [mips][ias] Range check uimm8 operandsDaniel Sanders2015-12-083-6/+7
| | | | | | | | | | | | Summary: Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D15226 llvm-svn: 255018
* [mips][ias] Range check uimm6 operands and fix a bug this revealed.Daniel Sanders2015-12-085-92/+70
| | | | | | | | | | | | | | | | | Summary: We don't check the size operand on ext/dext*/ins/dins* yet because the permitted range depends on the pos argument and we can't check that using this mechanism. The bug was that dextu/dinsu accepted 0..31 in the pos operand instead of 32..63. Reviewers: vkalintiris Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D15190 llvm-svn: 255015
* [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructionsZlatko Buljan2015-12-072-10/+37
| | | | | | Differential Revision: http://reviews.llvm.org/D9824 llvm-svn: 254897
* [mips][microMIPS] Implement PREPEND, RADDU.W.QB, RDDSP, REPL.PH, REPL.QB, ↵Hrvoje Varga2015-12-023-9/+96
| | | | | | | | REPLV.PH, REPLV.QB and MTHLIP instructions Differential Revision: http://reviews.llvm.org/D14527 llvm-svn: 254496
* [mips][microMIPS] Implement RECIP.fmt, RINT.fmt, ROUND.L.fmt, ROUND.W.fmt, ↵Hrvoje Varga2015-12-015-26/+169
| | | | | | | | SEL.fmt, SELEQZ.fmt, SELNEQZ.fmt and CLASS.fmt Differential Revision: http://reviews.llvm.org/D13885 llvm-svn: 254405
* Replace all weight-based interfaces in MBB with probability-based ↵Cong Hou2015-12-011-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | interfaces, and update all uses of old interfaces. (This is the second attempt to submit this patch. The first caused two assertion failures and was reverted. See https://llvm.org/bugs/show_bug.cgi?id=25687) The patch in http://reviews.llvm.org/D13745 is broken into four parts: 1. New interfaces without functional changes (http://reviews.llvm.org/D13908). 2. Use new interfaces in SelectionDAG, while in other passes treat probabilities as weights (http://reviews.llvm.org/D14361). 3. Use new interfaces in all other passes. 4. Remove old interfaces. This patch is 3+4 above. In this patch, MBB won't provide weight-based interfaces any more, which are totally replaced by probability-based ones. The interface addSuccessor() is redesigned so that the default probability is unknown. We allow unknown probabilities but don't allow using it together with known probabilities in successor list. That is to say, we either have a list of successors with all known probabilities, or all unknown probabilities. In the latter case, we assume each successor has 1/N probability where N is the number of successors. An assertion checks if the user is attempting to add a successor with the disallowed mixed use as stated above. This can help us catch many misuses. All uses of weight-based interfaces are now updated to use probability-based ones. Differential revision: http://reviews.llvm.org/D14973 llvm-svn: 254377
* Revert r254348: "Replace all weight-based interfaces in MBB with ↵Hans Wennborg2015-12-011-1/+2
| | | | | | | | | | probability-based interfaces, and update all uses of old interfaces." and the follow-up r254356: "Fix a bug in MachineBlockPlacement that may cause assertion failure during BranchProbability construction." Asserts were firing in Chromium builds. See PR25687. llvm-svn: 254366
OpenPOWER on IntegriCloud