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* [mips] Fix a memory leak bug report by NAKAMURA Takumi.Akira Hatanaka2012-12-121-5/+6
| | | | llvm-svn: 170012
* Sort includes for all of the .h files under the 'lib' tree. These wereChandler Carruth2012-12-041-2/+2
| | | | | | | | | | missed in the first pass because the script didn't yet handle include guards. Note that the script is now able to handle all of these headers without manual edits. =] llvm-svn: 169224
* Remove TargetELFWriterInfo.Rafael Espindola2012-10-281-5/+0
| | | | | | All the credit goes to Jan Voung for noticing it was dead! llvm-svn: 166902
* Implement a basic VectorTargetTransformInfo interface to be used by the loop ↵Nadav Rotem2012-10-241-1/+1
| | | | | | and bb vectorizers for modeling the cost of instructions. llvm-svn: 166593
* Reapply the TargerTransformInfo changes, minus the changes to LSR and ↵Nadav Rotem2012-10-181-0/+9
| | | | | | Lowerinvoke. llvm-svn: 166248
* Temporarily revert the TargetTransform changes.Bob Wilson2012-10-181-9/+0
| | | | | | | | | | | The TargetTransform changes are breaking LTO bootstraps of clang. I am working with Nadav to figure out the problem, but I am reverting it for now to get our buildbots working. This reverts svn commits: 165665 165669 165670 165786 165787 165997 and I have also reverted clang svn 165741 llvm-svn: 166168
* Add getters for the MIPS TargetTransform classesNadav Rotem2012-10-101-0/+7
| | | | llvm-svn: 165670
* Remove unused member variable introduced in r165665.David Blaikie2012-10-101-1/+0
| | | | llvm-svn: 165669
* Add a new interface to allow IR-level passes to access codegen-specific ↵Nadav Rotem2012-10-101-0/+3
| | | | | | information. llvm-svn: 165665
* Move TargetData to DataLayout.Micah Villmow2012-10-081-4/+4
| | | | llvm-svn: 165402
* Fix coding style violations in 162135 and 162136.Akira Hatanaka2012-08-201-1/+1
| | | | | | Patch by Petar Jovanovic. llvm-svn: 162213
* Correct MCJIT functionality for MIPS32 architecture.Akira Hatanaka2012-08-171-0/+6
| | | | | | | | | | No new tests are added. All tests in ExecutionEngine/MCJIT that have been failing pass after this patch is applied (when "make check" is done on a mips board). Patch by Petar Jovanovic. llvm-svn: 162135
* Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka2012-07-311-2/+2
| | | | | | | | | | MipsSEFrameLowering. Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be reserved if there is a call with a large call frame or there are variable sized objects on the stack. llvm-svn: 161090
* Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka2012-07-311-4/+7
| | | | | | and MipsSEInstrInfo (for mips32/64). llvm-svn: 161081
* Delete mips64 target machine classes. mips target machines can be used in placeAkira Hatanaka2012-07-311-68/+44
| | | | | | of them. llvm-svn: 161080
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-3/+1
| | | | llvm-svn: 158471
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-3/+3
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* add Emacs tag and fix some comment error in file headersJia Liu2012-02-171-1/+1
| | | | llvm-svn: 150775
* TargetPassConfig: confine the MC configuration to TargetMachine.Andrew Trick2012-02-041-2/+1
| | | | | | | | | | Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. llvm-svn: 149754
* Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick2012-02-031-4/+2
| | | | | | | | | | | Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
* Unweaken vtables as per ↵David Blaikie2011-12-201-0/+4
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Move global variables in TargetMachine into new TargetOptions class. As an APINick Lewycky2011-12-021-3/+5
| | | | | | | | | | | | change, now you need a TargetOptions object to create a TargetMachine. Clang patch to follow. One small functionality change in PTX. PTX had commented out the machine verifier parts in their copy of printAndVerify. That now calls the version in LLVMTargetMachine. Users of PTX who need verification disabled should rely on not passing the command-line flag to enable it. llvm-svn: 145714
* Sink codegen optimization level into MCCodeGenInfo along side relocation modelEvan Cheng2011-11-161-12/+13
| | | | | | | and code model. This eliminates the need to pass OptLevel flag all over the place and makes it possible for any codegen pass to use this information. llvm-svn: 144788
* Fix typo.Akira Hatanaka2011-09-221-2/+2
| | | | llvm-svn: 140313
* Add a base class for Mips TargetMachines and add Mips64 TargetMachines. Akira Hatanaka2011-09-211-1/+27
| | | | llvm-svn: 140233
* One more patch towards JIT support for Mips.Bruno Cardoso Lopes2011-09-141-1/+0
| | | | | | | | | | | | | | - Add TSFlags for the instruction formats. The idea here is to use as much encoding as possible from getBinaryCodeForInstr, and having TSFLags formats for that would make it easier to encode most part of the instructions (since Mips encodings are pretty straightforward) - Improve the mips mechanism for compilation callback - Add Mips specific code for invalidating the instruction cache - Next patch will address wrong tablegen encoding Commit msg added by my own but the patch is from Sasa Stankovic. llvm-svn: 139688
* Added the infrastructute necessary for MIPS JIT support. Patch by VladimirBruno Cardoso Lopes2011-07-211-0/+11
| | | | | | | | Stefanovic. I removed the part that actually emits the instructions cause I want that to get in better shape first and in incremental steps. This also makes it easier to review the upcoming parts. llvm-svn: 135678
* - Move CodeModel from a TargetMachine global option to MCCodeGenInfo.Evan Cheng2011-07-201-2/+4
| | | | | | | | - Introduce JITDefault code model. This tells targets to set different default code model for JIT. This eliminates the ugly hack in TargetMachine where code model is changed after construction. llvm-svn: 135580
* Introduce MCCodeGenInfo, which keeps information that can affect codegenEvan Cheng2011-07-191-5/+5
| | | | | | | (including compilation, assembly). Move relocation model Reloc::Model from TargetMachine to MCCodeGenInfo so it's accessible even without TargetMachine. llvm-svn: 135468
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-2/+3
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Prevent instructions using $gp from being placed between a jalr and the ↵Akira Hatanaka2011-05-041-0/+2
| | | | | | instruction that restores the clobbered $gp. llvm-svn: 130847
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-151-3/+3
| | | | | | in functionality. llvm-svn: 129612
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-151-3/+3
| | | | | | change in functionality. llvm-svn: 129606
* Add pass that expands pseudo instructions into target instructions after ↵Akira Hatanaka2011-04-151-0/+1
| | | | | | register allocation. Define pseudos that get expanded into mtc1 or mfc1 instructions. llvm-svn: 129594
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-5/+5
| | | | | | and fixes here and there. llvm-svn: 123170
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-8/+9
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Implement a bunch more TargetSelectionDAGInfo infrastructure.Dan Gohman2010-05-111-0/+6
| | | | | | | | Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and EmitTargetCodeForMemmove out of TargetLowering and into SelectionDAGInfo to exercise this. llvm-svn: 103481
* Use const qualifiers with TargetLowering. This eliminates severalDan Gohman2010-04-171-2/+2
| | | | | | | | | | | | | const_casts, and it reinforces the design of the Target classes being immutable. SelectionDAGISel::IsLegalToFold is now a static member function, because PIC16 uses it in an unconventional way. There is more room for API cleanup here. And PIC16's AsmPrinter no longer uses TargetLowering. llvm-svn: 101635
* Change TargetAsmInfo to be constructed via TargetRegistry from a Target+TripleChris Lattner2009-08-121-4/+0
| | | | | | | | pair instead of from a virtual method on TargetMachine. This cuts the final ties of TargetAsmInfo to TargetMachine, meaning that MC can now use TargetAsmInfo. llvm-svn: 78802
* Remove -disable-mips-abicall and -enable-mips-absolute-call command-line Eli Friedman2009-08-031-2/+3
| | | | | | | | | | | | | options, which don't appear to be useful. -enable-mips-absolute-call is completely unused (and unless I'm mistaken, is supposed to have the same effect that -relocation-model=dynamic-no-pic should have), and -disable-mips-abicall appears to be effectively a synonym for -relocation-model=static. Adjust the few users of hasABICall to checks which seem more appropriate. Update MipsSubtarget, MipsTargetMachine, and MipselTargetMachine to synchronize with recent changes. llvm-svn: 77938
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-021-4/+2
| | | | | | - The C, C++, MSIL, and Mips backends still need the module. llvm-svn: 77927
* Lift addAssemblyEmitter into LLVMTargetMachine.Daniel Dunbar2009-07-151-3/+0
| | | | | | - No functionality change. llvm-svn: 75859
* Remove old style hacks to register AsmPrinter into TargetMachine.Daniel Dunbar2009-07-151-12/+0
| | | | | | - No intended functionality change. llvm-svn: 75843
* Reapply TargetRegistry refactoring commits.Daniel Dunbar2009-07-151-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | --- Reverse-merging r75799 into '.': U test/Analysis/PointerTracking U include/llvm/Target/TargetMachineRegistry.h U include/llvm/Target/TargetMachine.h U include/llvm/Target/TargetRegistry.h U include/llvm/Target/TargetSelect.h U tools/lto/LTOCodeGenerator.cpp U tools/lto/LTOModule.cpp U tools/llc/llc.cpp U lib/Target/PowerPC/PPCTargetMachine.h U lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp U lib/Target/PowerPC/PPCTargetMachine.cpp U lib/Target/PowerPC/PPC.h U lib/Target/ARM/ARMTargetMachine.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/ARMTargetMachine.h U lib/Target/ARM/ARM.h U lib/Target/XCore/XCoreTargetMachine.cpp U lib/Target/XCore/XCoreTargetMachine.h U lib/Target/PIC16/PIC16TargetMachine.cpp U lib/Target/PIC16/PIC16TargetMachine.h U lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp U lib/Target/Alpha/AlphaTargetMachine.cpp U lib/Target/Alpha/AlphaTargetMachine.h U lib/Target/X86/X86TargetMachine.h U lib/Target/X86/X86.h U lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h U lib/Target/X86/AsmPrinter/X86AsmPrinter.cpp U lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h U lib/Target/X86/X86TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.cpp U lib/Target/MSP430/MSP430TargetMachine.h U lib/Target/CppBackend/CPPTargetMachine.h U lib/Target/CppBackend/CPPBackend.cpp U lib/Target/CBackend/CTargetMachine.h U lib/Target/CBackend/CBackend.cpp U lib/Target/TargetMachine.cpp U lib/Target/IA64/IA64TargetMachine.cpp U lib/Target/IA64/AsmPrinter/IA64AsmPrinter.cpp U lib/Target/IA64/IA64TargetMachine.h U lib/Target/IA64/IA64.h U lib/Target/MSIL/MSILWriter.cpp U lib/Target/CellSPU/SPUTargetMachine.h U lib/Target/CellSPU/SPU.h U lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp U lib/Target/CellSPU/SPUTargetMachine.cpp U lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp U lib/Target/Mips/MipsTargetMachine.cpp U lib/Target/Mips/MipsTargetMachine.h U lib/Target/Mips/Mips.h U lib/Target/Sparc/AsmPrinter/SparcAsmPrinter.cpp U lib/Target/Sparc/SparcTargetMachine.cpp U lib/Target/Sparc/SparcTargetMachine.h U lib/ExecutionEngine/JIT/TargetSelect.cpp U lib/Support/TargetRegistry.cpp llvm-svn: 75820
* Revert 75762, 75763, 75766..75769, 75772..75775, 75778, 75780, 75782 to ↵Stuart Hastings2009-07-151-4/+5
| | | | | | | | repair broken LLVM-GCC build. Will revert 75770 in the llvm-gcc trunk. llvm-svn: 75799
* Kill off old (TargetMachine level, not Target level) match quality functions.Daniel Dunbar2009-07-151-2/+0
| | | | llvm-svn: 75780
* Provide TargetMachine implementations with reference to Target they were createdDaniel Dunbar2009-07-151-2/+3
| | | | | | | | from. - This commit is almost entirely propogating the reference through the TargetMachine subclasses' constructor calls. llvm-svn: 75778
* Register Target's TargetMachine and AsmPrinter in the new registry.Daniel Dunbar2009-07-151-1/+1
| | | | | | | - This abuses TargetMachineRegistry's constructor for now, this will get cleaned up in time. llvm-svn: 75762
* Have asm printers use formatted_raw_ostream directly to avoid aDavid Greene2009-07-141-3/+3
| | | | | | dynamic_cast<>. llvm-svn: 75670
* Remove unused AsmPrinter OptLevel argument, and propogate.Daniel Dunbar2009-07-011-1/+0
| | | | | | | - This more or less amounts to a revert of r65379. I'm curious to know what happened that caused this variable to become unused. llvm-svn: 74579
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