| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [mips] Add backend support for Mips32r[35] and Mips64r[35]. | Daniel Sanders | 2015-02-18 | 1 | -2/+12 |
| * | [mips] Make MipsSubtarget::hasMips*() functions consistent. NFC. | Daniel Sanders | 2015-02-04 | 1 | -11/+10 |
| * | Move DataLayout back to the TargetMachine from TargetSubtargetInfo | Eric Christopher | 2015-01-26 | 1 | -2/+0 |
| * | Move the Mips target to storing the ABI in the TargetMachine rather | Eric Christopher | 2015-01-26 | 1 | -8/+5 |
| * | [mips] Remove a redundant semicolon and add space before curly brackets. NFC. | Toma Tabacu | 2015-01-16 | 1 | -2/+2 |
| * | [cleanup] Re-sort all the #include lines in LLVM using | Chandler Carruth | 2015-01-14 | 1 | -1/+1 |
| * | Make the TargetMachine in MipsSubtarget a reference rather | Eric Christopher | 2015-01-08 | 1 | -3/+3 |
| * | Remove unused variable, initializer, and accessor. | Eric Christopher | 2014-12-19 | 1 | -1/+0 |
| * | MipsABIInfo class is used in different libraries. Moving the files to MCTarge... | Vladimir Medic | 2014-12-17 | 1 | -1/+1 |
| * | [mips] Add preliminary support for the MIPS II target. | Vasileios Kalintiris | 2014-11-11 | 1 | -0/+1 |
| * | [mips] Replace MipsABIEnum with a MipsABIInfo class. | Daniel Sanders | 2014-10-24 | 1 | -14/+8 |
| * | constify the TargetMachine being passed through the Mips subtarget | Eric Christopher | 2014-09-19 | 1 | -2/+3 |
| * | [mips] Remove inverted predicates from MipsSubtarget that were only used by M... | Daniel Sanders | 2014-09-10 | 1 | -3/+0 |
| * | [mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSiz... | Daniel Sanders | 2014-09-09 | 1 | -0/+1 |
| * | Reinstate "Nuke the old JIT." | Eric Christopher | 2014-09-02 | 1 | -3/+0 |
| * | Canonicalize header guards into a common format. | Benjamin Kramer | 2014-08-13 | 1 | -2/+2 |
| * | [mips] Invert the abicalls feature bit to be noabicalls so that it's possible... | Daniel Sanders | 2014-08-08 | 1 | -3/+3 |
| * | [mips] Initial implementation of -mabicalls/-mno-abicalls. | Daniel Sanders | 2014-08-08 | 1 | -0/+4 |
| * | Temporarily Revert "Nuke the old JIT." as it's not quite ready to | Eric Christopher | 2014-08-07 | 1 | -0/+3 |
| * | Nuke the old JIT. | Rafael Espindola | 2014-08-07 | 1 | -3/+0 |
| * | Remove the TargetMachine forwards for TargetSubtargetInfo based | Eric Christopher | 2014-08-04 | 1 | -8/+14 |
| * | [mips] Don't use odd-numbered single precision registers for fastcc calling | Sasa Stankovic | 2014-07-29 | 1 | -0/+1 |
| * | Fundamentally change the MipsSubtarget replacement machinery: | Eric Christopher | 2014-07-18 | 1 | -20/+1 |
| * | Avoid caching the relocation model on the subtarget, this is for | Eric Christopher | 2014-07-18 | 1 | -6/+2 |
| * | Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachine | Eric Christopher | 2014-07-18 | 1 | -1/+5 |
| * | Move Post RA Scheduling flag bit into SchedMachineModel | Sanjay Patel | 2014-07-15 | 1 | -3/+4 |
| * | [mips] Expand BuildPairF64 to a spill and reload when the O32 FPXX ABI is | Sasa Stankovic | 2014-07-14 | 1 | -1/+2 |
| * | [mips] Added FPXX modeless calling convention. | Zoran Jovanovic | 2014-07-10 | 1 | -0/+4 |
| * | [mips] Add support for -modd-spreg/-mno-odd-spreg | Daniel Sanders | 2014-07-10 | 1 | -0/+5 |
| * | Mips.abiflags is a new implicitly generated section that will be present on ... | Vladimir Medic | 2014-07-08 | 1 | -0/+4 |
| * | Move subtarget dependent features into the subtarget from the target | Eric Christopher | 2014-07-03 | 1 | -1/+26 |
| * | Move the data layout and selection dag info from the mips target machine | Eric Christopher | 2014-07-02 | 1 | -0/+7 |
| * | Break out subtarget initialization that dependent variables need into | Eric Christopher | 2014-07-02 | 1 | -0/+2 |
| * | Move MipsJITInfo to the subtarget rather than the target machine. | Eric Christopher | 2014-07-02 | 1 | -0/+5 |
| * | [mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-06-16 | 1 | -1/+4 |
| * | [mips][mips64r6] ll, sc, lld, and scd are re-encoded on MIPS32r6/MIPS64r6. | Daniel Sanders | 2014-06-16 | 1 | -1/+1 |
| * | [mips] Use MTHC1 when it is available (MIPS32r2 and later) for both FP32 and ... | Daniel Sanders | 2014-06-12 | 1 | -5/+10 |
| * | [mips][mips64r6] [ls][dw][lr] are not available in MIPS32r6/MIPS64r6 | Daniel Sanders | 2014-05-23 | 1 | -1/+6 |
| * | [mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu... | Daniel Sanders | 2014-05-13 | 1 | -0/+3 |
| * | [mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=m... | Daniel Sanders | 2014-05-12 | 1 | -0/+3 |
| * | [mips] Fold FeatureBitCount into FeatureMips32 and FeatureMips64 | Daniel Sanders | 2014-05-12 | 1 | -4/+0 |
| * | [mips] Fold FeatureSEInReg into FeatureMips32r2 | Daniel Sanders | 2014-05-12 | 1 | -4/+0 |
| * | [mips] Fold FeatureSwap into FeatureMips32r2 and FeatureMips64r2 | Daniel Sanders | 2014-05-12 | 1 | -4/+0 |
| * | [mips] Replace FeatureFPIdx with FeatureMips4_32r2 | Daniel Sanders | 2014-05-12 | 1 | -5/+5 |
| * | [mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=... | Daniel Sanders | 2014-05-09 | 1 | -0/+4 |
| * | [mips] Remove unused CondMov feature bit | Daniel Sanders | 2014-05-09 | 1 | -4/+0 |
| * | [mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu... | Daniel Sanders | 2014-05-09 | 1 | -0/+4 |
| * | [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6 | Daniel Sanders | 2014-05-09 | 1 | -2/+7 |
| * | [mips] Marked up instructions added in MIPS-II and tested that IAS for -mcpu=... | Daniel Sanders | 2014-05-08 | 1 | -0/+1 |
| * | [mips] Add highly experimental support for MIPS-I, MIPS-II, MIPS-III, and MIPS-V | Daniel Sanders | 2014-05-07 | 1 | -1/+2 |
