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path: root/llvm/lib/Target/Mips/MipsSubtarget.cpp
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* - Added MCSubtargetInfo to capture subtarget features and schedulingEvan Cheng2011-07-011-0/+9
| | | | | | | | | itineraries. - Refactor TargetSubtarget to be based on MCSubtargetInfo. - Change tablegen generated subtarget info to initialize MCSubtargetInfo and hide more details from targets. llvm-svn: 134257
* Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name toEvan Cheng2011-06-301-4/+6
| | | | | | | | | | be the first encoded as the first feature. It then uses the CPU name to look up features / scheduling itineray even though clients know full well the CPU name being used to query these properties. The fix is to just have the clients explictly pass the CPU name! llvm-svn: 134127
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-151-3/+3
| | | | | | in functionality. llvm-svn: 129612
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-151-3/+3
| | | | | | change in functionality. llvm-svn: 129606
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by ↵Bruno Cardoso Lopes2011-03-041-2/+2
| | | | | | Hatanaka, Akira llvm-svn: 127003
* reintroduce support for Mips "small" section handling. This is Chris Lattner2009-08-131-9/+0
| | | | | | | implemented somewhat differently than before, but it should have the same functionality and the previous testcase passes again. llvm-svn: 78900
* Restore some "small section" support code, reverting my patch from r76936.Chris Lattner2009-08-131-0/+8
| | | | llvm-svn: 78894
* Remove -disable-mips-abicall and -enable-mips-absolute-call command-line Eli Friedman2009-08-031-21/+5
| | | | | | | | | | | | | options, which don't appear to be useful. -enable-mips-absolute-call is completely unused (and unless I'm mistaken, is supposed to have the same effect that -relocation-model=dynamic-no-pic should have), and -disable-mips-abicall appears to be effectively a synonym for -relocation-model=static. Adjust the few users of hasABICall to checks which seem more appropriate. Update MipsSubtarget, MipsTargetMachine, and MipselTargetMachine to synchronize with recent changes. llvm-svn: 77938
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-021-3/+1
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* remove more remnants of small section support.Chris Lattner2009-07-241-7/+0
| | | | llvm-svn: 76936
* Added support for fround, fextend and FP_TO_SINTBruno Cardoso Lopes2009-05-271-0/+1
| | | | llvm-svn: 72483
* Fixed Bug 2751Bruno Cardoso Lopes2008-09-151-3/+3
| | | | | | | | | | | http://llvm.org/bugs/show_bug.cgi?id=2751 Abicall was enabled even when static code model was provided in the command line. The correct behavior is to disable abicall when static is specified. llvm-svn: 56228
* Make option variables static, so they won't cause nameclashAnton Korobeynikov2008-08-221-7/+10
| | | | llvm-svn: 55203
* Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT nodeBruno Cardoso Lopes2008-08-131-0/+2
| | | | | | | | | | | | | | | | is lowered properly and covers everything LowerSELECT_CC did. Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This avoid the ugly instruction by instruction checking in printOperand. Added a swap instruction present in the allegrex core. Added two conditional instructions present in the allegrex core : MOVZ and MOVN. They both allow a more efficient SELECT operation for integers. Also added SELECT patterns to optimize MOVZ and MOVN usage. The brcond and setcc patterns were cleaned: redundant and suboptimal patterns were removed. The suboptimals were replaced by more efficient ones. Fixed some instructions that were using immZExt16 instead of immSExt16. llvm-svn: 54724
* Support added for ctlz intrinsic, test case added.Bruno Cardoso Lopes2008-08-081-0/+1
| | | | llvm-svn: 54516
* Match raw "psp" triple target, as done by the homebrew toolchain.Bruno Cardoso Lopes2008-08-081-1/+2
| | | | llvm-svn: 54514
* Added new features to represent specific instructions groupsBruno Cardoso Lopes2008-07-301-2/+3
| | | | llvm-svn: 54213
* Added initial support for small sections on Mips.Bruno Cardoso Lopes2008-07-211-0/+6
| | | | | | | Added gp_rel relocations to support addressing small section contents. Added command line to specify small section threshold in bytes. llvm-svn: 53869
* Added Subtarget support into RegisterInfoBruno Cardoso Lopes2008-07-141-2/+22
| | | | | | | | | | | | Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and -mno-shared). HasAbsoluteCall is not implemented but HasABICall is the default for o32 ABI. Now, both should help into a more accurate relocation types implementation. Added IsLinux is needed to choose between asm directives. Instruction name strings cleanup. AsmPrinter improved. llvm-svn: 53551
* Fixed features usage.Bruno Cardoso Lopes2008-07-091-3/+3
| | | | llvm-svn: 53277
* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-051-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
* Some Mips minor fixesBruno Cardoso Lopes2008-06-041-2/+3
| | | | | | Added support for mips little endian arch => mipsel llvm-svn: 51923
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Better processor definitionBruno Cardoso Lopes2007-11-061-1/+1
| | | | llvm-svn: 43749
* support for Schedule included on Mips.tdBruno Cardoso Lopes2007-08-181-1/+2
| | | | llvm-svn: 41159
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-061-0/+26
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461
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