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path: root/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
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* [mips] Fix handling of instructions which copy to/from accumulator registers.Akira Hatanaka2013-04-301-14/+16
| | | | | | | | | Expand copy instructions between two accumulator registers before callee-saved scan is done. Handle copies between integer GPR and hi/lo registers in MipsSEInstrInfo::copyPhysReg. Delete pseudo-copy instructions that are not needed. llvm-svn: 180827
* [mips] Small update to the implementation of eh.return for Mips.Akira Hatanaka2013-04-021-0/+4
| | | | | | | | | | This patch initializes t9 to the handler address, but only if the relocation model is pic. This handles the case where handler to which eh.return jumps points to the start of the function. Patch by Sasa Stankovic. llvm-svn: 178588
* [mips] Fix MipsSEInstrInfo::copyPhysReg, loadRegFromStack and storeRegToStackAkira Hatanaka2013-03-301-0/+18
| | | | | | to handle accumulator registers. llvm-svn: 178392
* [mips] Define overloaded versions of storeRegToStack and loadRegFromStack.Akira Hatanaka2013-03-291-11/+9
| | | | | | No functionality changes. llvm-svn: 178327
* [mips] Lower EH_RETURN.Akira Hatanaka2013-01-301-0/+29
| | | | | | Patch by Sasa Stankovic. llvm-svn: 173862
* [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copyAkira Hatanaka2012-12-201-5/+5
| | | | | | | | | | | physical register $r1 to $r0. GNU disassembler recognizes an "or" instruction as a "move", and this change makes the disassembled code easier to read. Original patch by Reed Kotler. llvm-svn: 170655
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-3/+3
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* [mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka2012-11-031-7/+10
| | | | | | register is needed. llvm-svn: 167341
* [mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directiveAkira Hatanaka2012-11-021-1/+0
| | | | | | | "set .noat" so that the assembler doesn't issue warnings when register $AT is used. llvm-svn: 167310
* Make function loadImmediate a member of MipsSEInstrInfo and change it to returnAkira Hatanaka2012-08-231-4/+43
| | | | | | | | | | the temporary register that was used to load the immediate. Currently, it always returns register $at, but this will change if, in the future, we decide to use another register. No changes in functionality. llvm-svn: 162417
* Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka2012-08-021-0/+4
| | | | | | of MipsTargetMachine.cpp. llvm-svn: 161191
* Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emitsAkira Hatanaka2012-07-311-0/+20
| | | | | | | instructions that decrement and increment the stack pointer before and after a call when the function does not have a reserved call frame. llvm-svn: 161093
* Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo andAkira Hatanaka2012-07-311-0/+5
| | | | | | MipsSERegisterInfo. llvm-svn: 161092
* Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka2012-07-311-0/+291
and MipsSEInstrInfo (for mips32/64). llvm-svn: 161081
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