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path: root/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
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* [mips] Instruction selection patterns for DSP-ASE vector select and compareAkira Hatanaka2013-04-301-2/+61
| | | | | | instructions. llvm-svn: 180820
* [mips] Compare splat value with element size instead of calling isUIntN.Akira Hatanaka2013-04-231-2/+2
| | | | | | No intended changes in functionality. llvm-svn: 180130
* 80 columns.Akira Hatanaka2013-04-221-3/+4
| | | | llvm-svn: 180040
* [mips] In performDSPShiftCombine, check that all elements in the vector areAkira Hatanaka2013-04-221-3/+5
| | | | | | | shifted by the same amount and the shift amount is smaller than the element size. llvm-svn: 180039
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-201-1/+0
| | | | llvm-svn: 179939
* [mips] Instruction selection patterns for DSP-ASE vector shifts.Akira Hatanaka2013-04-191-0/+63
| | | | llvm-svn: 179906
* [mips] Move MipsTargetLowering::lowerINTRINSIC_W_CHAIN andAkira Hatanaka2013-04-131-0/+171
| | | | | | | | lowerINTRINSIC_WO_CHAIN into MipsSETargetLowering. No functionality changes. llvm-svn: 179444
* [mips] Reapply r179420 and r179421.Akira Hatanaka2013-04-131-0/+5
| | | | llvm-svn: 179434
* Revert r179420 and r179421.Akira Hatanaka2013-04-121-5/+0
| | | | llvm-svn: 179422
* [mips] v4i8 and v2i16 add, sub and mul instruction selection patterns.Akira Hatanaka2013-04-121-0/+5
| | | | llvm-svn: 179420
* [mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selectsAkira Hatanaka2013-04-111-1/+4
| | | | | | | | multiply instructions in MipsSEDAGToDAGISel. This patch was supposed to be part of r178403. llvm-svn: 179314
* This patch enables llvm to switch between compiling for mips32/mips64 Reed Kotler2013-04-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and mips16 on a per function basis. Because this patch is somewhat involved I have provide an overview of the key pieces of it. The patch is written so as to not change the behavior of the non mixed mode. We have tested this a lot but it is something new to switch subtargets so we don't want any chance of regression in the mainline compiler until we have more confidence in this. Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1. For that reason there are derived versions of the register info, frame info, instruction info and instruction selection classes. Now we register three separate passes for instruction selection. One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and MipsSEISelDAGToDAG.cpp). When the ModuleISel pass runs, it determines if there is a need to switch subtargets and if so, the owning pointers in MipsTargetMachine are appropriately changed. When 16Isel or SEIsel is run, they will return immediately without doing any work if the current subtarget mode does not apply to them. In addition, MipsAsmPrinter needs to be reset on a function basis. The pass BasicTargetTransformInfo is substituted with a null pass since the pass is immutable and really needs to be a function pass for it to be used with changing subtargets. This will be fixed in a follow on patch. llvm-svn: 179118
* Remove unused variables.Akira Hatanaka2013-03-301-2/+0
| | | | llvm-svn: 178405
* [mips] Move the code which does dag-combine for multiply-add/sub nodes toAkira Hatanaka2013-03-301-0/+197
| | | | | | | | | derived class MipsSETargetLowering. We shouldn't be generating madd/msub nodes if target is Mips16, since Mips16 doesn't have support for multipy-add/sub instructions. llvm-svn: 178404
* [mips] Fix definitions of multiply, multiply-add/sub and divide instructions.Akira Hatanaka2013-03-301-0/+50
| | | | | | | | | The new instructions have explicit register output operands and use table-gen patterns instead of C++ code to do instruction selection. Mips16's instructions are unaffected by this change. llvm-svn: 178403
* [mips] Fix filename in comment and delete unnecessary lines of code.Akira Hatanaka2013-03-141-5/+1
| | | | | | No functionality changes. llvm-svn: 177104
* [mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is forAkira Hatanaka2013-03-131-0/+201
mips16 and MipsSETargetLowering is for mips32/64. No functionality changes. llvm-svn: 176917
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