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* [mips] Split the DSP control register and define one register for each field ofAkira Hatanaka2013-05-031-2/+33
| | | | | | | | | | | its fields. This removes false dependencies between DSP instructions which access different fields of the the control register. Implicit register operands are added to instructions RDDSP and WRDSP after instruction selection, depending on the value of the mask operand. llvm-svn: 181041
* ArrayRefize getMachineNode(). No functionality change.Michael Liao2013-04-191-2/+2
| | | | llvm-svn: 179901
* [mips] Reapply r179420 and r179421.Akira Hatanaka2013-04-131-0/+2
| | | | llvm-svn: 179434
* Revert r179420 and r179421.Akira Hatanaka2013-04-121-2/+0
| | | | llvm-svn: 179422
* [mips] Instruction selection patterns for carry-setting and using addAkira Hatanaka2013-04-121-0/+2
| | | | | | instructions. llvm-svn: 179421
* [mips] Custom-lower i64 MULHS and MULHU nodes. Remove the code which selectsAkira Hatanaka2013-04-111-63/+0
| | | | | | | | multiply instructions in MipsSEDAGToDAGISel. This patch was supposed to be part of r178403. llvm-svn: 179314
* This patch enables llvm to switch between compiling for mips32/mips64 Reed Kotler2013-04-091-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and mips16 on a per function basis. Because this patch is somewhat involved I have provide an overview of the key pieces of it. The patch is written so as to not change the behavior of the non mixed mode. We have tested this a lot but it is something new to switch subtargets so we don't want any chance of regression in the mainline compiler until we have more confidence in this. Mips32/64 are very different from Mip16 as is the case of ARM vs Thumb1. For that reason there are derived versions of the register info, frame info, instruction info and instruction selection classes. Now we register three separate passes for instruction selection. One which is used to switch subtargets (MipsModuleISelDAGToDAG.cpp) and then one for each of the current subtargets (Mips16ISelDAGToDAG.cpp and MipsSEISelDAGToDAG.cpp). When the ModuleISel pass runs, it determines if there is a need to switch subtargets and if so, the owning pointers in MipsTargetMachine are appropriately changed. When 16Isel or SEIsel is run, they will return immediately without doing any work if the current subtarget mode does not apply to them. In addition, MipsAsmPrinter needs to be reset on a function basis. The pass BasicTargetTransformInfo is substituted with a null pass since the pass is immutable and really needs to be a function pass for it to be used with changing subtargets. This will be fixed in a follow on patch. llvm-svn: 179118
* [mips] Fix definitions of multiply, multiply-add/sub and divide instructions.Akira Hatanaka2013-03-301-0/+13
| | | | | | | | | The new instructions have explicit register output operands and use table-gen patterns instead of C++ code to do instruction selection. Mips16's instructions are unaffected by this change. llvm-svn: 178403
* [mips] Define function MipsSEDAGToDAGISel::selectAddESubE.Akira Hatanaka2013-03-141-31/+28
| | | | | | No intended functionality changes. llvm-svn: 177095
* [mips] Rename functions and variables to start with proper case.Akira Hatanaka2013-03-141-22/+22
| | | | llvm-svn: 177092
* [mips] Define two subclasses of MipsDAGToDAGISel. Mips16DAGToDAGISel is forAkira Hatanaka2013-03-141-0/+463
mips16 and MipsSEDAGToDAGISel is for mips32/64. No functionality changes. llvm-svn: 177089
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