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* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-141-4/+4
| | | | | | | | | This adds location info for all llvm_unreachable calls (which is a macro now) in !NDEBUG builds. In NDEBUG builds location info and the message is off (it only prints "UREACHABLE executed"). llvm-svn: 75640
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-111-4/+5
| | | | | | | | | Make llvm_unreachable take an optional string, thus moving the cerr<< out of line. LLVM_UNREACHABLE is now a simple wrapper that makes the message go away for NDEBUG builds. llvm-svn: 75379
* Fix a missing def-flag on a Mips epilogue load.Jakob Stoklund Olesen2009-05-161-4/+4
| | | | llvm-svn: 71935
* Removed AFGR32 register classBruno Cardoso Lopes2009-03-211-2/+8
| | | | | | Handle odd registers allocation in FGR32. llvm-svn: 67422
* This causes incorrect stack frame allocation when the last object is an ↵Bruno Cardoso Lopes2009-03-151-1/+1
| | | | | | | | array allocated on the stack which would lead the compiled program to run over its stack. Thanks to Gil Dogon llvm-svn: 67034
* Propagate debug loc info through prologue/epilogue.Bill Wendling2009-02-231-2/+3
| | | | llvm-svn: 65298
* Remove non-DebugLoc versions of BuildMI from IA64, Mips.Dale Johannesen2009-02-131-12/+14
| | | | llvm-svn: 64438
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-1/+1
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Re-apply 56683 with fixes.Evan Cheng2008-09-271-1/+2
| | | | llvm-svn: 56748
* Temporarily reverting r56683. This is causing a failure during the build of ↵Bill Wendling2008-09-261-3/+1
| | | | | | | | | | | | | | | | | llvm-gcc: /Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311. ../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://developer.apple.com/bugreporter> for instructions. {standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" {standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression {standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb" ... llvm-svn: 56703
* Fix @llvm.frameaddress codegen. FP elimination optimization should be ↵Evan Cheng2008-09-261-1/+3
| | | | | | disabled when frame address is desired. Also add support for depth > 0. llvm-svn: 56683
* Added Mips support for DYNAMIC_STACKALLOCBruno Cardoso Lopes2008-08-071-0/+3
| | | | | | | | | Fixed bug in adjustMipsStackFrame, which was breaking while trying to access a dead stack object index. Also added one more alignment before fixing the callee saved registers stack offset adjustment. llvm-svn: 54485
* Added support for fp callee saved registers.Bruno Cardoso Lopes2008-08-061-84/+170
| | | | | | | | | | | | | | | | | | | | | Added fp register clobbering during calls. Added AsmPrinter support for "fmask", a bitmask that indicates where on the stack the fp callee saved registers are. Fixed the stack frame layout for Mips, now the callee saved regs are in the right stack location (a little documentation about how this stack frame must look like is present in MipsRegisterInfo.cpp). This was done using the method MipsRegisterInfo::adjustMipsStackFrame To be more clear, these are examples of what is solves : 1) FP and RA are also callee saved, and despite they aren't in CSI they must be saved before the fp callee saved registers. 2) The ABI requires that local varibles are allocated before the callee saved register area, the opposite behavior from the default allocation. 3) CPU and FPU saved register area must be aligned independent of each other. llvm-svn: 54403
* Improved asm inline for hi,lo resultsBruno Cardoso Lopes2008-08-021-3/+6
| | | | | | | | Added hi,lo registers to be used,def implicitly. This provides better handle of instructions which use hi/lo. Fixes a small BranchAnalysis bug llvm-svn: 54274
* Fixed call stack alignment. Improved AsmPrinter alignment issues.Bruno Cardoso Lopes2008-07-151-2/+3
| | | | llvm-svn: 53585
* Added Subtarget support into RegisterInfoBruno Cardoso Lopes2008-07-141-8/+14
| | | | | | | | | | | | Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and -mno-shared). HasAbsoluteCall is not implemented but HasABICall is the default for o32 ABI. Now, both should help into a more accurate relocation types implementation. Added IsLinux is needed to choose between asm directives. Instruction name strings cleanup. AsmPrinter improved. llvm-svn: 53551
* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-051-38/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
* Some Mips minor fixesBruno Cardoso Lopes2008-06-041-2/+2
| | | | | | Added support for mips little endian arch => mipsel llvm-svn: 51923
* Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.Evan Cheng2008-03-311-10/+0
| | | | llvm-svn: 48995
* Fix "Control reaches the end of non-void function" warnings, Chris Lattner2008-03-301-0/+1
| | | | | | patch by David Chisnall. llvm-svn: 48963
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-1/+1
| | | | llvm-svn: 46930
* Trivial patch to fix two warnings, please pull into llvm 2.2Chris Lattner2008-01-221-0/+3
| | | | llvm-svn: 46243
* Move even more functionality from MRegisterInfo into TargetInstrInfo.Owen Anderson2008-01-071-31/+0
| | | | | | Some day I'll get it all moved over... llvm-svn: 45672
* Move some more instruction creation methods from RegisterInfo into InstrInfo.Owen Anderson2008-01-011-65/+0
| | | | llvm-svn: 45484
* Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of theOwen Anderson2007-12-311-18/+0
| | | | | | Machine-level API cleanup instigated by Chris. llvm-svn: 45470
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-3/+3
| | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner2007-12-301-2/+2
| | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Add a argument to storeRegToStackSlot and storeRegToAddr to specify whetherEvan Cheng2007-12-051-3/+4
| | | | | | the stored register is killed. llvm-svn: 44600
* Remove redundant foldMemoryOperand variants and other code clean up.Evan Cheng2007-12-021-3/+6
| | | | llvm-svn: 44517
* Allow some reloads to be folded in multi-use cases. Specifically testl r, r ↵Evan Cheng2007-12-011-6/+0
| | | | | | -> cmpl [mem], 0. llvm-svn: 44479
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-0/+6
| | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997
* Added support for PIC code with "explicit relocations" *only*.Bruno Cardoso Lopes2007-11-051-3/+19
| | | | | | | Removed all macro code for PIC (goodbye "la"). Support tested with shootout bench. llvm-svn: 43697
* - Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but ↵Evan Cheng2007-10-181-2/+2
| | | | | | | | only returns the opcode of the instruction post unfolding. - Fix some copy+paste bugs. llvm-svn: 43153
* Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister ↵Evan Cheng2007-10-181-4/+4
| | | | | | public interface. llvm-svn: 43150
* Position Independent Code (PIC) support [3]Bruno Cardoso Lopes2007-10-091-2/+13
| | | | llvm-svn: 42780
* - Added a few target hooks to generate load / store instructions from / to anyEvan Cheng2007-10-051-0/+41
| | | | | | | | address (not just from / to frameindexes). - Added target hooks to unfold load / store instructions / SDNodes into separate load, data processing, store instructions / SDNodes. llvm-svn: 42621
* Allow copyRegToReg to emit cross register classes copies.Evan Cheng2007-09-261-2/+8
| | | | | | Tested with "make check"! llvm-svn: 42346
* Added method to get Mips register numbersBruno Cardoso Lopes2007-08-281-55/+101
| | | | | | | Changed the stack frame layout, StackGrowsUp fits better to Mips strange stack. Stack offset calculation bug fixed! llvm-svn: 41529
* Fixed stack frame addressing bugBruno Cardoso Lopes2007-08-181-8/+8
| | | | llvm-svn: 41160
* Change instruction description to split OperandList into OutOperandList andEvan Cheng2007-07-191-2/+2
| | | | | | | | | | | | | | | InOperandList. This gives one piece of important information: # of results produced by an instruction. An example of the change: def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; => def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2), "add{l} {$src2, $dst|$dst, $src2}", [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>; llvm-svn: 40033
* Added support for framepointerBruno Cardoso Lopes2007-07-111-28/+162
| | | | | | | Prologue/Epilogue support fp,ra save/restore and use the stack frame the right way! llvm-svn: 39763
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-061-0/+288
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461
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