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* Mips32 does not reserve even-numbered floating point registers.Akira Hatanaka2011-09-091-5/+0
| | | | llvm-svn: 139412
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
| | | | | | better location welcome). llvm-svn: 135438
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-15/+1
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Simplify MipsRegisterInfo::eliminateFrameIndex.Akira Hatanaka2011-07-071-33/+13
| | | | llvm-svn: 134628
* Reverse order of operands of address operand mem so that the base operand comesAkira Hatanaka2011-07-071-2/+2
| | | | | | | before the offset. This change will enable simplification of function MipsRegisterInfo::eliminateFrameIndex. llvm-svn: 134625
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-011-22/+31
| | | | llvm-svn: 134224
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+3
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-3/+4
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-211-4/+6
| | | | llvm-svn: 133494
* Remove custom allocation order boilerplate that is no longer needed.Jakob Stoklund Olesen2011-06-091-0/+2
| | | | | | | | | | | | | | | | | | | | The register allocators automatically filter out reserved registers and place the callee saved registers last in the allocation order, so custom methods are no longer necessary just for that. Some targets still use custom allocation orders: ARM/Thumb: The high registers are removed from GPR in thumb mode. The NEON allocation orders prefer to use non-VFP2 registers first. X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble. SystemZ: Some of the allocation orders are omitting R12 aliases without explanation. I don't understand this target well enough to fix that. It looks like all the boilerplate could be removed by reserving the right registers. llvm-svn: 132781
* Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.Eric Christopher2011-06-091-6/+4
| | | | llvm-svn: 132777
* Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of theAkira Hatanaka2011-06-081-4/+6
| | | | | | dynamically allocated stack area was not set. llvm-svn: 132758
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+4
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Change the set of callee-saved registers for non-MIPS32 architectures specifiedAkira Hatanaka2011-05-281-9/+1
| | | | | | | | | in MipsRegisterInfo::getCalleeSavedRegs so that both registers paired for a double precision register get saved. llvm-svn: 132243
* Add support for C++ exception handling.Akira Hatanaka2011-05-261-2/+1
| | | | llvm-svn: 132131
* Enable printing of immediates that do not fit in 16-bit. .cprestore can haveAkira Hatanaka2011-05-241-1/+1
| | | | | | offsets that are larger than 0x10000. llvm-svn: 132003
* Change StackDirection from StackGrowsUp to StackGrowsDown.Akira Hatanaka2011-05-231-22/+23
| | | | | | | | | | | | | | | | The following improvements are accomplished as a result of applying this patch: - Fixed frame objects' offsets (relative to either the virtual frame pointer or the stack pointer) are set before instruction selection is completed. There is no need to wait until Prologue/Epilogue Insertion is run to set them. - Calculation of final offsets of fixed frame objects is straightforward. It is no longer necessary to assign negative offsets to fixed objects for incoming arguments in order to distinguish them from the others. - Since a fixed object has its relative offset set during instruction selection, there is no need to conservatively set its alignment to 4. - It is no longer necessary to reorder non-fixed frame objects in MipsFrameLowering::adjustMipsStackFrame. llvm-svn: 131915
* Use the correct register to access stack frame objects.Akira Hatanaka2011-05-211-10/+31
| | | | llvm-svn: 131785
* Make $fp and $ra callee-saved registers and let PrologEpilogInserter handleAkira Hatanaka2011-05-201-3/+3
| | | | | | saving and restoring them. llvm-svn: 131745
* Increase number of available registers when target is MIPS32.Akira Hatanaka2011-05-191-1/+9
| | | | llvm-svn: 131660
* 1. Keep lines in 80 columns.Akira Hatanaka2011-05-061-1/+1
| | | | | | | 2. Remove unused function. 3. Correct indentation. llvm-svn: 131028
* Fix function MipsRegisterInfo::getRegisterNumbering.Akira Hatanaka2011-05-031-10/+10
| | | | llvm-svn: 130774
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-151-5/+5
| | | | | | in functionality. llvm-svn: 129612
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-151-7/+9
| | | | | | change in functionality. llvm-svn: 129606
* Expands register/immediate pairs when the immediate is too large to fit in ↵Bruno Cardoso Lopes2011-03-041-2/+35
| | | | | | 16-bit field. Patch by Akira Hatanaka llvm-svn: 127032
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by ↵Bruno Cardoso Lopes2011-03-041-11/+11
| | | | | | Hatanaka, Akira llvm-svn: 127003
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-2/+2
| | | | | | and fixes here and there. llvm-svn: 123170
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-12/+4
| | | | llvm-svn: 119740
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-269/+0
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-4/+2
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* Remove the TargetRegisterClass member from CalleeSavedInfoRafael Espindola2010-06-021-3/+4
| | | | llvm-svn: 105344
* cleanupRafael Espindola2010-06-021-28/+0
| | | | llvm-svn: 105322
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-5/+5
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-2/+1
| | | | llvm-svn: 100214
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* Fix stack size bug while using o32 abiBruno Cardoso Lopes2010-02-011-10/+18
| | | | llvm-svn: 94969
* reduce redundant are's.Chris Lattner2010-01-201-1/+1
| | | | llvm-svn: 94008
* Only include in the callee saved regs the sub registers to avoidBruno Cardoso Lopes2009-11-251-5/+2
| | | | | | unnecessary save/restore. llvm-svn: 89823
* Add a bool flag to StackObjects telling whether they reference spillDavid Greene2009-11-121-3/+3
| | | | | | | | | | | | | slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
* Fix PR5149.Bruno Cardoso Lopes2009-11-091-8/+5
| | | | | | http://llvm.org/bugs/show_bug.cgi?id=5149 llvm-svn: 86543
* Add register-reuse to frame-index register scavenging. When a target usesJim Grosbach2009-10-071-3/+4
| | | | | | | | | | | | | | | | | | | | a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. llvm-svn: 83467
* eliminate the last DOUTs from the targets.Chris Lattner2009-08-231-14/+6
| | | | llvm-svn: 79833
* remove various std::ostream version of printing methods fromChris Lattner2009-08-231-6/+6
| | | | | | | | MachineInstr and MachineOperand. This required eliminating a bunch of stuff that was using DOUT, I hope that bill doesn't mind me stealing his fun. ;-) llvm-svn: 79813
* This void is implicit in C++.Dan Gohman2009-08-121-1/+1
| | | | llvm-svn: 78848
* Major calling convention code refactoring.Dan Gohman2009-08-051-3/+3
| | | | | | | | | | | | | | | | | | | Instead of awkwardly encoding calling-convention information with ISD::CALL, ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering provides three virtual functions for targets to override: LowerFormalArguments, LowerCall, and LowerRet, which replace the custom lowering done on the special nodes. They provide the same information, but in a more immediately usable format. This also reworks much of the target-independent tail call logic. The decision of whether or not to perform a tail call is now cleanly split between target-independent portions, and the target dependent portion in IsEligibleForTailCallOptimization. This also synchronizes all in-tree targets, to help enable future refactoring and feature work. llvm-svn: 78142
* More migration to raw_ostream, the water has dried up around the iostream hole.Daniel Dunbar2009-07-251-1/+2
| | | | | | | | | | - Some clients which used DOUT have moved to DEBUG. We are deprecating the "magic" DOUT behavior which avoided calling printing functions when the statement was disabled. In addition to being unnecessary magic, it had the downside of leaving code in -Asserts builds, and of hiding potentially unnecessary computations. llvm-svn: 77019
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