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* [mips][msa] Added bitconverts for vector types for big and little-endianDaniel Sanders2013-08-271-2/+149
| | | | llvm-svn: 189330
* [mips][msa] Split MSA128 regset into size-specific sets containing the same ↵Daniel Sanders2013-08-231-463/+463
| | | | | | registers. llvm-svn: 189095
* [mips][msa] Removed fcge, fcgt, fsge, fsgtDaniel Sanders2013-08-201-44/+0
| | | | | | | These instructions were present in a draft spec but were removed before publication. llvm-svn: 188782
* [mips][msa] Added insveDaniel Sanders2013-08-201-0/+32
| | | | llvm-svn: 188777
* [mips][msa] Added and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.vDaniel Sanders2013-08-201-0/+59
| | | | llvm-svn: 188767
* Reverted test commit (r188556)Daniel Sanders2013-08-161-1/+0
| | | | llvm-svn: 188557
* Test commit. Just a blank lineDaniel Sanders2013-08-161-0/+1
| | | | llvm-svn: 188556
* [Mips][msa] Added the simple builtins (madd_q to xori)Jack Carter2013-08-151-0/+842
| | | | | | | | | | | | Includes: madd_q, maddr_q, maddv, max_[asu], maxi_[su], min_[asu], mini_[su], mod_[su], msub_q, msubr_q, msubv, mul_q, mulr_q, mulv, nloc, nlzc, nori, ori, pckev, pckod, pcnt, sat_[su], shf, sld, sldi, sll, slli, splat, splati, sr[al], sr[al]i, subs_[su], subss_u, subus_s, subv, subvi, vshf, xori Patch by Daniel Sanders llvm-svn: 188460
* [Mips][msa] Added the simple builtins (fadd to ftq)Jack Carter2013-08-151-0/+467
| | | | | | | | | | | | Includes: fadd, fceq, fcg[et], fclass, fcl[et], fcne, fcun, fdiv, fexdo, fexp2, fexup[lr], ffint_[su], ffql, ffqr, fill, flog2, fmadd, fmax, fmax_a, fmin, fmin_a, fmsub, fmul, frint, frcp, frsqrt, fseq, fsge, fsgt, fsle, fslt, fsne, fsqr, fsub, ftint_s, ftq Patch by Daniel Sanders llvm-svn: 188458
* [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)Jack Carter2013-08-151-4/+1133
| | | | | | | | | | | | | Includes: add_a, adds_[asu], addv, addvi, andi.b, asub_[su].[bhwd], aver?_[su]_[bhwd], bclr, bclri, bins[lr], bins[lr]i, bmnzi, bmzi, bneg, bnegi, bseli, bset, bseti, c(eq|ne), c(eq|ne)i, cl[et]_[su], cl[et]i_[su], copy_[su].[bhw], div_[su], dotp_[su], dpadd_[su], dpsub_[su], ilvev, ilvl, ilvod, ilvr, insv, insve, ldi Patch by Daniel Sanders llvm-svn: 188457
* [Mips][msa] Added initial MSA support.Jack Carter2013-08-131-0/+69
* msa SubtargetFeature * registers * ld.[bhwd], and st.[bhwd] instructions Does not correctly prohibit use of both 32-bit FPU registers and MSA together. Patch by Daniel Sanders llvm-svn: 188313
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