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path: root/llvm/lib/Target/Mips/MipsJITInfo.cpp
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* Implement MipsJITInfo::replaceMachineCodeForFunction.Akira Hatanaka2012-08-011-1/+46
| | | | | | | | | | No new test case is added. This patch makes test JITTest.FunctionIsRecompiledAndRelinked pass on mips platform. Patch by Petar Jovanovic. llvm-svn: 161098
* Fix coding style violations. Remove white spaces and tabs.Akira Hatanaka2012-06-141-3/+3
| | | | llvm-svn: 158471
* remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.Jia Liu2012-02-171-1/+1
| | | | llvm-svn: 150805
* add Emacs tag and fix some comment error in file headersJia Liu2012-02-171-1/+1
| | | | llvm-svn: 150775
* Removing unused default switch cases in switches over enums that already ↵David Blaikie2012-01-161-3/+0
| | | | | | | | account for all enumeration values explicitly. (This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them) llvm-svn: 148262
* Improve Mips JIT.Bruno Cardoso Lopes2011-12-301-1/+1
| | | | | | | | | | | Implement encoder methods getJumpTargetOpValue and getBranchTargetOpValue for jmptarget and brtarget Mips tablegen operand types in the code emitter for old-style JIT. Rename the pc relative relocation for branches - new name is Mips::reloc_mips_pc16. Patch by Sasa Stankovic llvm-svn: 147382
* This patch handles unaligned loads and stores in Mips JIT. Mips backendBruno Cardoso Lopes2011-11-081-2/+8
| | | | | | | | | | | | implements unaligned loads and stores with assembler macro-instructions ulw, usw, ulh, ulhu, ush, and this patch emits corresponding instructions instead of these macros. Since each unaligned load/store is expanded into two corresponding loads/stores where offset for second load/store is modified by +3 (for words) or +1 (for halfwords). Patch by Petar Jovanovic and Sasa Stankovic. llvm-svn: 144081
* Corrects previously incorrect $sp change in MipsCompilationCallback.Bruno Cardoso Lopes2011-10-251-7/+7
| | | | | | | | The address for $sp, and addresses for sdc1/ldc1 must be 8-byte aligned Patch by Petar Jovanovic. llvm-svn: 142930
* One more patch towards JIT support for Mips.Bruno Cardoso Lopes2011-09-141-51/+86
| | | | | | | | | | | | | | - Add TSFlags for the instruction formats. The idea here is to use as much encoding as possible from getBinaryCodeForInstr, and having TSFLags formats for that would make it easier to encode most part of the instructions (since Mips encodings are pretty straightforward) - Improve the mips mechanism for compilation callback - Add Mips specific code for invalidating the instruction cache - Next patch will address wrong tablegen encoding Commit msg added by my own but the patch is from Sasa Stankovic. llvm-svn: 139688
* Added the infrastructute necessary for MIPS JIT support. Patch by VladimirBruno Cardoso Lopes2011-07-211-0/+195
Stefanovic. I removed the part that actually emits the instructions cause I want that to get in better shape first and in incremental steps. This also makes it easier to review the upcoming parts. llvm-svn: 135678
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