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path: root/llvm/lib/Target/Mips/MipsInstrInfo.td
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* [mips] Add madd4 subtarget featurePetar Jovanovic2017-06-061-0/+6
* Add extra operand to CALLSEQ_START to keep frame part set up previouslySerge Pavlov2017-05-091-3/+3
* [Mips] Add support to match more patterns for DEXT and CINSPetar Jovanovic2017-03-151-0/+5
* [mips] Revert fixes for PR32020.Simon Dardis2017-03-091-17/+3
* [mips] Fix 64bit slt/sltu/nor with immediatesSimon Dardis2017-02-281-6/+7
* Recommit "[mips] Fix atomic compare and swap at O0."Simon Dardis2017-02-241-3/+17
* Revert "[mips] Fix atomic compare and swap at O0."Simon Dardis2017-02-241-17/+3
* [mips] Fix atomic compare and swap at O0.Simon Dardis2017-02-241-3/+17
* [mips] Handle 64 bit immediate in and/or/xor pseudo instructions on mips64Simon Dardis2017-02-241-10/+12
* [mips][ias] Further relax operands of certain assembly instructionsSimon Dardis2017-02-231-47/+33
* [mips] divide macro instruction cleanup.Simon Dardis2017-02-131-33/+17
* [mips] MUL macro variationsSimon Dardis2017-02-081-0/+22
* [mips] Expansion of BEQL and BNEL with immediate operandsSimon Dardis2017-02-021-0/+3
* [mips] Addition of the immediate cases for the instructions [d]div, [d]divuSimon Dardis2017-01-311-0/+28
* [mips] Recommit: "N64 static relocation model support"Simon Dardis2017-01-271-24/+56
* Revert "[mips] N64 static relocation model support"Simon Dardis2017-01-261-56/+24
* [mips] N64 static relocation model supportSimon Dardis2017-01-261-24/+56
* [mips] seb, seh instruction aliasesSimon Dardis2016-11-221-0/+4
* [mips] Add support for unaligned load/store macros.Vasileios Kalintiris2016-11-221-0/+6
* [mips] seq macro supportSimon Dardis2016-11-211-0/+21
* [mips] not instruction aliasSimon Dardis2016-11-161-0/+3
* [mips] synci microMIPS instruction definition.Simon Dardis2016-10-241-3/+3
* [mips] Fix sync instruction definitionSimon Dardis2016-10-181-2/+1
* [mips] Macro expansion for ld, sd for O32Simon Dardis2016-10-181-0/+11
* [mips] Fix aui/daui/dahi/dati for MIPSR6Simon Dardis2016-10-141-0/+13
* Target: Remove unused patterns and transforms. NFC.Peter Collingbourne2016-10-071-4/+0
* [mips][ias] fix li macro when values are negated with ~Simon Dardis2016-10-051-3/+25
* Recommit: "[mips] Add rsqrt, recip for MIPS"Simon Dardis2016-10-051-0/+8
* Revert "[mips] Add rsqrt, recip for MIPS"Simon Dardis2016-10-051-33/+3
* [mips] Add rsqrt, recip for MIPSSimon Dardis2016-09-271-3/+33
* Revert "[mips] Fix aui/daui/dahi/dati for MIPSR6"Simon Dardis2016-09-161-14/+0
* [mips] Fix aui/daui/dahi/dati for MIPSR6Simon Dardis2016-09-161-0/+14
* [mips][microMIPS] Implement DBITSWAP, DLSA and LWUPC and add tests for AUI in...Hrvoje Varga2016-09-081-1/+20
* [mips] Correct tail call encoding for MIPSR6Simon Dardis2016-08-181-9/+8
* [mips] Enable tail calls by defaultSimon Dardis2016-08-041-2/+5
* [mips] Clang generates unaligned offset for MSA instruction st.dHrvoje Varga2016-08-011-1/+7
* [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliasesSimon Dardis2016-07-261-2/+22
* [mips] Optimize materialization of i64 constantsSimon Dardis2016-07-251-11/+28
* [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructionsHrvoje Varga2016-07-221-50/+57
* [mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2...Zlatko Buljan2016-07-111-9/+10
* Convert more cases to isPositionIndependent(). NFC.Rafael Espindola2016-06-281-3/+3
* [mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instruct...Hrvoje Varga2016-06-271-5/+25
* [mips] Eliminate unused code for addrRegReg complex pattern. NFC.Vasileios Kalintiris2016-06-151-3/+0
* [mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NO...Zlatko Buljan2016-06-151-23/+29
* [mips][atomics] Fix atomic instruction descriptions and uses.Simon Dardis2016-06-141-2/+11
* [mips] MIPS32/64 itinerariesSimon Dardis2016-06-141-81/+91
* [mips][microMIPS] Implement BOVC, BNVC, EXT, INS and JALRC instructionsHrvoje Varga2016-06-091-6/+7
* [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGe...Zlatko Buljan2016-05-181-9/+14
* [mips] Addition of a third operand to the instructions [d]div, [d]divuZoran Jovanovic2016-05-161-11/+28
* [mips][microMIPS] Implement APPEND, BPOSGE32C, MODSUB, MULSA.W.PH and MULSAQ_...Hrvoje Varga2016-05-131-0/+6
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