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path: root/llvm/lib/Target/Mips/MipsInstrInfo.h
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* [mips] Fix MipsLongBranch pass to work when the offset from the branch to theSasa Stankovic2014-04-301-0/+4
| | | | | | | | | | | | | | target cannot be determined accurately. This is the case for NaCl where the sandboxing instructions are added in MC layer, after the MipsLongBranch pass. It is also the case when the code has inline assembly. Instead of calculating offset in the MipsLongBranch pass, use %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions that are resolved during the fixup. This patch also deletes microMIPS test file test/CodeGen/Mips/micromips-long-branch.ll and implements microMIPS CHECKs in a much simpler way in a file test/CodeGen/Mips/longbranch.ll, together with MIPS32 and MIPS64. llvm-svn: 207656
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-23/+23
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-0/+1
| | | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 195064
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-1/+0
| | | | | | | | | | | | This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. llvm-svn: 194997
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-0/+1
| | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy llvm-svn: 194865
* DebugInfo: remove target-specific Frame Index handling for DBG_VALUE ↵David Blaikie2013-06-161-5/+0
| | | | | | | | | | MachineInstrs Frame index handling is now target-agnostic, so delete the target hooks for creation & asm printing of target-specific addressing in DBG_VALUEs and any related functions. llvm-svn: 184067
* [mips] Define a helper function which creates an instruction with the sameAkira Hatanaka2013-05-131-0/+6
| | | | | | operands as the prototype instruction but with a different opcode. llvm-svn: 181714
* [mips] Rename functions. No functionality changes.Akira Hatanaka2013-05-131-2/+2
| | | | llvm-svn: 181713
* [mips] Define overloaded versions of storeRegToStack and loadRegFromStack.Akira Hatanaka2013-03-291-0/+30
| | | | | | No functionality changes. llvm-svn: 178327
* [mips] Define an overloaded version of function MipsInstrInfo::AnalyzeBranchAdd.Akira Hatanaka2013-03-011-0/+15
| | | | | | | | This function will be used later when the capability to search delay slot filling instructions in successor blocks is added. No intended functionality changes. llvm-svn: 176325
* Make function loadImmediate a member of MipsSEInstrInfo and change it to returnAkira Hatanaka2012-08-231-12/+0
| | | | | | | | | | the temporary register that was used to load the immediate. Currently, it always returns register $at, but this will change if, in the future, we decide to use another register. No changes in functionality. llvm-svn: 162417
* Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka2012-08-021-0/+6
| | | | | | of MipsTargetMachine.cpp. llvm-svn: 161191
* Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo andAkira Hatanaka2012-07-311-2/+1
| | | | | | MipsSERegisterInfo. llvm-svn: 161092
* Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka2012-07-311-62/+31
| | | | | | and MipsSEInstrInfo (for mips32/64). llvm-svn: 161081
* Add basic ability to setup call frame, and make procedure calls.Akira Hatanaka2012-07-231-1/+4
| | | | | | | | Hello world will compile and execute with this patch. Patch by Reed Kotler. llvm-svn: 160651
* Revert accidental commit.Akira Hatanaka2012-07-211-4/+1
| | | | llvm-svn: 160598
* Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.Akira Hatanaka2012-07-211-1/+4
| | | | | | Test case will be added later when long branch patch is checked in. llvm-svn: 160597
* Make register Mips::RA allocatable if not in mips16 mode.Akira Hatanaka2012-07-101-0/+2
| | | | llvm-svn: 159971
* Define function MipsInstrInfo::GetInstSizeInBytes, which will be called toAkira Hatanaka2012-06-141-6/+20
| | | | | | | compute the size of basic blocks in a function. Also, define a function which emits a series of instructions to load an immediate. llvm-svn: 158429
* Move the code in MipsExpandPseudo to MipsInstrInfo::expandPostRAPseudo.Akira Hatanaka2012-05-251-0/+6
| | | | | | Delete MipsExpandPseudo. llvm-svn: 157495
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* remove blanks, and some code formatJia Liu2012-02-281-1/+1
| | | | llvm-svn: 151625
* Add an option to use a virtual register as the global base register instead ofAkira Hatanaka2012-02-241-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | reserving a physical register ($gp or $28) for that purpose. This will completely eliminate loads that restore the value of $gp after every function call, if the register allocator assigns a callee-saved register, or eliminate unnecessary loads if it assigns a temporary register. example: .cpload $25 // set $gp. ... .cprestore 16 // store $gp to stack slot 16($sp). ... jalr $25 // function call. clobbers $gp. lw $gp, 16($sp) // not emitted if callee-saved reg is chosen. ... lw $2, 4($gp) ... jalr $25 // function call. lw $gp, 16($sp) // not emitted if $gp is not live after this instruction. ... llvm-svn: 151402
* Emit B (unconditional branch) when -relocation-model=pic and J (jump) whenAkira Hatanaka2011-12-121-0/+1
| | | | | | -relocation-model=static. llvm-svn: 146432
* Mips MC object code emission improvements:Bruno Cardoso Lopes2011-11-111-80/+0
| | | | | | | | | | "With this patch we can now generate runnable Mips code through LLVM direct object emission. We have run numerous simple programs, both C and C++ and with -O0 and -O3 from the output. The code is not production ready, but quite useful for experimentation." Patch and message by Jack Carter llvm-svn: 144414
* Simplify and update functions storeRegToStackSlot and loadRegFromStackSlot.Akira Hatanaka2011-10-111-0/+1
| | | | llvm-svn: 141613
* Add enums and functions for symbols Mips64 uses.Akira Hatanaka2011-09-221-1/+8
| | | | llvm-svn: 140295
* One more patch towards JIT support for Mips.Bruno Cardoso Lopes2011-09-141-0/+27
| | | | | | | | | | | | | | - Add TSFlags for the instruction formats. The idea here is to use as much encoding as possible from getBinaryCodeForInstr, and having TSFLags formats for that would make it easier to encode most part of the instructions (since Mips encodings are pretty straightforward) - Improve the mips mechanism for compilation callback - Add Mips specific code for invalidating the instruction cache - Next patch will address wrong tablegen encoding Commit msg added by my own but the patch is from Sasa Stankovic. llvm-svn: 139688
* Lower MachineInstr to MC Inst and print to .s files. Akira Hatanaka2011-07-071-92/+1
| | | | llvm-svn: 134661
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-011-1/+4
| | | | llvm-svn: 134244
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-011-0/+5
| | | | llvm-svn: 134224
* This patch implements the thread local storage. Implemented are GeneralBruno Cardoso Lopes2011-05-311-1/+15
| | | | | | | | Dynamic, Initial Exec and Local Exec TLS models. Patch by Sasa Stankovic llvm-svn: 132322
* Reverse unnecessary changes made in r129606 and r129608. There is no change ↵Akira Hatanaka2011-04-151-6/+5
| | | | | | in functionality. llvm-svn: 129612
* Fix lines that have incorrect indentation or exceed 80 columns. There is no ↵Akira Hatanaka2011-04-151-5/+6
| | | | | | change in functionality. llvm-svn: 129606
* Simplifies logic for printing target flags.Akira Hatanaka2011-04-011-3/+3
| | | | llvm-svn: 128741
* Add code for analyzing FP branches. Clean up branch Analysis functions.Akira Hatanaka2011-04-011-16/+10
| | | | llvm-svn: 128718
* Added support for FP conditional move instructions and fixed bugs in ↵Akira Hatanaka2011-03-311-9/+9
| | | | | | handling of FP comparisons. llvm-svn: 128650
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by ↵Bruno Cardoso Lopes2011-03-041-11/+11
| | | | | | Hatanaka, Akira llvm-svn: 127003
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-161-6/+0
| | | | llvm-svn: 108567
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-111-12/+0
| | | | | | | | The only folding these load/store architectures can do is converting COPY into a load or store, and the target independent part of foldMemoryOperand already knows how to do that. llvm-svn: 108099
* Replace copyRegToReg with copyPhysReg for Mips.Jakob Stoklund Olesen2010-07-111-6/+4
| | | | llvm-svn: 108066
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-171-1/+2
| | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-061-1/+2
| | | | | | doesn't have to guess. llvm-svn: 103194
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-061-2/+4
| | | | llvm-svn: 103193
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-051-1/+0
| | | | | | | MachineBasicBlock::canFallThrough(), which is target-independent and more thorough. llvm-svn: 90634
* Remove explicit enum integer values. They don't appear to be needed, andDan Gohman2009-10-051-5/+5
| | | | | | they make it less convenient to add new entries. llvm-svn: 83308
* Reapply 80278Bruno Cardoso Lopes2009-09-011-0/+32
| | | | | | | | Add MO flags to simplify the printing of relocations. Remove the support for printing large code model relocs (which aren't supported anyway). llvm-svn: 80691
* Revert 80278 for now, it caused a lot of MIPS tests to failBruno Cardoso Lopes2009-08-271-32/+0
| | | | llvm-svn: 80280
* Revamp our friend Mips :)Bruno Cardoso Lopes2009-08-271-0/+32
| | | | | | | | Add MO flags to simplify the printing of relocations. Remove the support for printing large code model relocs (which aren't supported anyway). llvm-svn: 80278
* Remove unused member functions.Eli Friedman2009-07-241-10/+0
| | | | llvm-svn: 76960
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