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* Pass DebugLoc and SDLoc by const ref.Benjamin Kramer2016-06-121-22/+24
| | | | | | | | This used to be free, copying and moving DebugLocs became expensive after the metadata rewrite. Passing by reference eliminates a ton of track/untrack operations. No functionality change intended. llvm-svn: 272512
* [PR27599] [SystemZ] [SelectionDAG] Fix extension of atomic cmpxchg result.Marcin Koscielnicki2016-05-101-2/+2
| | | | | | | | | | | | Currently, SelectionDAG assumes 8/16-bit cmpxchg returns either a sign extended result, or a zero extended result. SystemZ takes a third option by returning junk in the high bits (rotated contents of the other bytes in the memory word). In that case, don't use Assert*ext, and zero-extend the result ourselves if a comparison is needed. Differential Revision: http://reviews.llvm.org/D19800 llvm-svn: 269075
* CodeGen: extend RHS when splitting ATOMIC_CMP_SWAP_WITH_SUCCESS.Tim Northover2016-03-241-0/+4
| | | | | | | | | | | | | If the operation's type has been promoted during type legalization, we need to account for the fact that the high bits of the comparison operand are likely unspecified. The LHS is usually zero-extended, but MIPS sign extends it, so we have to be slightly careful. Patch by Simon Dardis. llvm-svn: 264296
* Tweak some atomics functions in preparation for larger changes; NFC.James Y Knight2016-03-161-0/+4
| | | | | | | | | | | | | | | | - Rename getATOMIC to getSYNC, as llvm will soon be able to emit both '__sync' libcalls and '__atomic' libcalls, and this function is for the '__sync' ones. - getInsertFencesForAtomic() has been replaced with shouldInsertFencesForAtomic(Instruction), so that the decision can be made per-instruction. This functionality will be used soon. - emitLeadingFence/emitTrailingFence are no longer called if shouldInsertFencesForAtomic returns false, and thus don't need to check the condition themselves. llvm-svn: 263665
* Revert "[mips] Promote the result of SETCC nodes to GPR width."Vasileios Kalintiris2016-03-011-6/+0
| | | | | | | | | This reverts commit r262316. It seems that my change breaks an out-of-tree chromium buildbot, so I'm reverting this in order to investigate the situation further. llvm-svn: 262387
* [mips] Promote the result of SETCC nodes to GPR width.Vasileios Kalintiris2016-03-011-0/+6
| | | | | | | | | | | | | | | | | | | | Summary: This patch modifies the existing comparison, branch, conditional-move and select patterns, and adds new ones where needed. Also, the updated SLT{u,i,iu} set of instructions generate a GPR width result. The majority of the code changes in the Mips back-end fix the wrong assumption that the result of SETCC nodes always produce an i32 value. The changes in the common code path account for the fact that in 64-bit MIPS targets, i1 is promoted to i32 instead of i64. Reviewers: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D10970 llvm-svn: 262316
* Mips: Remove lowerSELECT_CCMatt Arsenault2016-01-111-1/+0
| | | | | | This is the same as the default expansion. llvm-svn: 257346
* [MIPS] add overrides for isCheapToSpeculateCttz() and isCheapToSpeculateCtlz()Sanjay Patel2015-11-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MIPS32 has instructions for efficient count-leading/trailing-zeros, so this should be considered a cheap operation (and therefore fair game for speculation) for any MIPS32 implementation. The net result of allowing this speculation for the regression tests in this patch is that we get this code: ctlz: jr $ra clz $2, $4 cttz: addiu $1, $4, -1 not $2, $4 and $1, $2, $1 clz $1, $1 addiu $2, $zero, 32 jr $ra subu $2, $2, $1 Instead of: ctlz: beqz $4, $BB0_2 addiu $2, $zero, 32 clz $2, $4 $BB0_2: jr $ra nop cttz: beqz $4, $BB1_2 addiu $2, $zero, 32 addiu $1, $4, -1 not $2, $4 and $1, $2, $1 clz $1, $1 addiu $2, $zero, 32 subu $2, $2, $1 $BB1_2: jr $ra nop See D14469 for the larger motivation. Differential Revision: http://reviews.llvm.org/D14500 llvm-svn: 252755
* [WinEH] Update exception pointer registersJoseph Tremoulet2015-11-071-0/+14
| | | | | | | | | | | | | | | | | | | | Summary: The CLR's personality routine passes these in rdx/edx, not rax/eax. Make getExceptionPointerRegister a virtual method parameterized by personality function to allow making this distinction. Similarly make getExceptionSelectorRegister a virtual method parameterized by personality function, for symmetry. Reviewers: pgavlin, majnemer, rnk Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14344 llvm-svn: 252383
* [mips] Interrupt attribute support for mips32r2+.Vasileios Kalintiris2015-10-261-0/+7
| | | | | | | | | | | | | | | | | | | Summary: This patch adds support for using the "interrupt" attribute on Mips for interrupt handling functions. At this time only mips32r2+ with the o32 ABI with the static relocation model is supported. Unsupported configurations will be rejected Patch by Simon Dardis (+ clang-format & some trivial changes to follow the LLVM coding standards by me). Reviewers: mpf, dsanders Subscribers: dsanders, vkalintiris, llvm-commits Differential Revision: http://reviews.llvm.org/D10768 llvm-svn: 251286
* Use std::is_sorted to replace a custom version. Also replace a comparison ↵Craig Topper2015-10-171-6/+0
| | | | | | predicate struct with a lambda. llvm-svn: 250623
* [mips] Reserve address spaces 1-255 for software use.Daniel Sanders2015-09-081-0/+8
| | | | | | | | | | | | Summary: And define them to have noop casts with address spaces 0-255. Reviewers: pekka.jaaskelainen Subscribers: pekka.jaaskelainen, llvm-commits Differential Revision: http://reviews.llvm.org/D12678 llvm-svn: 246990
* PseudoSourceValue: Replace global manager with a manager in a machine function.Alex Lorenz2015-08-111-3/+4
| | | | | | | | | | | | | | | | | | | | | | This commit removes the global manager variable which is responsible for storing and allocating pseudo source values and instead it introduces a new manager class named 'PseudoSourceValueManager'. Machine functions now own an instance of the pseudo source value manager class. This commit also modifies the 'get...' methods in the 'MachinePointerInfo' class to construct pseudo source values using the instance of the pseudo source value manager object from the machine function. This commit updates calls to the 'get...' methods from the 'MachinePointerInfo' class in a lot of different files because those calls now need to pass in a reference to a machine function to those methods. This change will make it easier to serialize pseudo source values as it will enable me to transform the mips specific MipsCallEntry PseudoSourceValue subclass into two target independent subclasses. Reviewers: Akira Hatanaka llvm-svn: 244693
* Allow {e,r}bp as the target of {read,write}_register.Pat Gavlin2015-07-091-1/+2
| | | | | | | | | | This patch allows the read_register and write_register intrinsics to read/write the RBP/EBP registers on X86 iff the targeted register is the frame pointer for the containing function. Differential Revision: http://reviews.llvm.org/D10977 llvm-svn: 241827
* Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT userMehdi Amini2015-07-091-1/+1
| | | | | | | A documentation for this function would be nice by the way. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241807
* Make isLegalAddressingMode() taking DataLayout as an argumentMehdi Amini2015-07-091-2/+2
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11040 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241778
* Make TargetLowering::getShiftAmountTy() taking DataLayout as an argumentMehdi Amini2015-07-091-1/+3
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, llvm-commits, rafael, yaron.keren Differential Revision: http://reviews.llvm.org/D11037 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241776
* Make TargetLowering::getPointerTy() taking DataLayout as an argumentMehdi Amini2015-07-091-1/+2
| | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. Reviewers: echristo Subscribers: jholewinski, ted, yaron.keren, rafael, llvm-commits Differential Revision: http://reviews.llvm.org/D11028 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 241775
* [TargetLowering] StringRefize asm constraint getters.Benjamin Kramer2015-07-051-6/+4
| | | | | | | | There is some functional change here because it changes target code from atoi(3) to StringRef::getAsInteger which has error checking. For valid constraints there should be no difference. llvm-svn: 241411
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-2/+2
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-2/+2
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* Add address space argument to isLegalAddressingModeMatt Arsenault2015-06-011-1/+2
| | | | | | | | | | This is important because of different addressing modes depending on the address space for GPU targets. This only adds the argument, and does not update any of the uses to provide the correct address space. llvm-svn: 238723
* Migrate existing backends that care about software floating pointEric Christopher2015-05-121-0/+1
| | | | | | | | | | | | | | | | | | | | to use the information in the module rather than TargetOptions. We've had and clang has used the use-soft-float attribute for some time now so have the backends set a subtarget feature based on a particular function now that subtargets are created based on functions and function attributes. For the one middle end soft float check go ahead and create an overloadable TargetLowering::useSoftFloat function that just checks the TargetSubtargetInfo in all cases. Also remove the command line option that hard codes whether or not soft-float is set by using the attribute for all of the target specific test cases - for the generic just go ahead and add the attribute in the one case that showed up. llvm-svn: 237079
* Change getTargetNodeName() to produce compiler warnings for missing cases, ↵Matthias Braun2015-05-071-1/+1
| | | | | | fix them llvm-svn: 236775
* [mips] Distinguish 'R', 'ZC', and 'm' inline assembly memory constraint.Daniel Sanders2015-03-241-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Previous behaviour of 'R' and 'm' has been preserved for now. They will be improved in subsequent commits. The offset permitted by ZC varies according to the subtarget since it is intended to match the restrictions of the pref, ll, and sc instructions. The restrictions on these instructions are: * For microMIPS: 12-bit signed offset. * For Mips32r6/Mips64r6: 9-bit signed offset. * Otherwise: 16-bit signed offset. Reviewers: vkalintiris Reviewed By: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8414 llvm-svn: 233063
* Fix sign extension for MIPS64 in makeLibCall functionPetar Jovanovic2015-03-231-0/+2
| | | | | | | | | | | | Fixing sign extension in makeLibCall for MIPS64. In MIPS64 architecture all 32 bit arguments (int, unsigned int, float 32 (soft float)) must be sign extended. This fixes test "MultiSource/Applications/oggenc/". Patch by Strahinja Petrovic. Differential Revision: http://reviews.llvm.org/D7791 llvm-svn: 232943
* Make each target map all inline assembly memory constraints to ↵Daniel Sanders2015-03-161-0/+6
| | | | | | | | | | | | | | | | | | | InlineAsm::Constraint_m. NFC. Summary: This is instead of doing this in target independent code and is the last non-functional change before targets begin to distinguish between different memory constraints when selecting code for the ISD::INLINEASM node. Next, each target will individually move away from the idea that all memory constraints behave like 'm'. Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D8173 llvm-svn: 232373
* getRegForInlineAsmConstraint wants to use TargetRegisterInfo forEric Christopher2015-02-261-3/+4
| | | | | | | | | a lookup, pass that in rather than use a naked call to getSubtargetImpl. This involved passing down and around either a TargetMachine or TargetRegisterInfo. Update all callers/definitions around the targets and SelectionDAG. llvm-svn: 230699
* Remove most of the TargetMachine::getSubtarget/getSubtargetImplEric Christopher2015-01-291-0/+3
| | | | | | | | | calls that don't take a Function argument from Mips. Notable exceptions: the AsmPrinter and MipsTargetObjectFile. The latter needs to be fixed, and the former will be fixed when the general AsmPrinter changes happen. llvm-svn: 227512
* [mips] Fix 'jumpy' debug line info around calls.Daniel Sanders2015-01-241-18/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: At the moment, address calculation is taking the debug line info from the address node (e.g. TargetGlobalAddress). When a function is called multiple times, this results in output of the form: .loc $first_call_location .. address calculation .. .. function call .. .. address calculation .. .loc $second_call_location .. function call .. .loc $first_call_location .. address calculation .. .loc $third_call_location .. function call .. This patch makes address calculations for function calls take the debug line info for the call node and results in output of the form: .loc $first_call_location .. address calculation .. .. function call .. .loc $second_call_location .. address calculation .. .. function call .. .loc $third_call_location .. address calculation .. .. function call .. All other address calculations continue to use the address node. Test Plan: Fixes test/DebugInfo/multiline.ll on a mips host. Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D7050 llvm-svn: 227005
* [mips] Add support for accessing $gp as a named register.Daniel Sanders2015-01-091-0/+2
| | | | | | | | | | | | | | | | | | | | | Summary: Mips Linux uses $gp to hold a pointer to thread info structure and accesses it with a named register. This makes this work for LLVM. The N32 ABI doesn't quite work yet since the frontend generates incorrect IR for this case. It neglects to truncate the 64-bit GPR to a 32-bit value before converting to a pointer. Given correct IR (as in the testcase in this patch), it works correctly. Reviewers: sstankovic, vmedic, atanasyan Reviewed By: atanasyan Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6893 llvm-svn: 225529
* [mips] Support SELECT nodes for targets that don't have conditional-move ↵Vasileios Kalintiris2014-12-121-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | instructions. Summary: For Mips targets that do not have conditional-move instructions, ie. targets before MIPS32 and MIPS-IV, we have to insert a diamond control-flow pattern in order to support SELECT nodes. In order to do that, we add pseudo-instructions with a custom inserter that emits the necessary control-flow that selects the correct value. With this patch we add complete support for code generation of Mips-II targets based on the LLVM test-suite. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6212 llvm-svn: 224124
* [mips] Removed the remainder of MipsCC. NFC.Daniel Sanders2014-11-071-18/+6
| | | | | | | | | | | | | | | | | Summary: One of the calls to AllocateStack (the one in LowerCall) doesn't look like it should be there but it was there before and removing it breaks the frame size calculation. Reviewers: vmedic, theraven Reviewed By: theraven Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6116 llvm-svn: 221529
* [mips] Remove MipsCC::reservedArgArea() in favour of ↵Daniel Sanders2014-11-071-5/+2
| | | | | | | | | | | | | | | | MipsABIInfo::GetCalleeAllocdArgSizeInBytes(). NFC. Summary: Reviewers: theraven, vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6115 llvm-svn: 221528
* [mips] Remove remaining use of MipsCC::intArgRegs() in favour of ↵Daniel Sanders2014-11-071-3/+0
| | | | | | | | | | | | | | | | MipsABIInfo::GetByValArgRegs() and MipsABIInfo::GetVarArgRegs() Summary: Depends on D6112 Reviewers: theraven, vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6113 llvm-svn: 221521
* [mips] Remove MipsCC::getRegVT(). NFCDaniel Sanders2014-11-071-7/+0
| | | | | | | | | | | | | | Summary: It's no longer used. Reviewers: vmedic, theraven Reviewed By: theraven Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6112 llvm-svn: 221519
* [mips] Remove MipsCC::analyzeCallOperands in favour of ↵Daniel Sanders2014-11-071-4/+0
| | | | | | | | | | | | | | | | | | CCState::AnalyzeCallOperands. NFC Summary: In addition to the usual f128 workaround, it was also necessary to provide a means of accessing ArgListEntry::IsFixed. Reviewers: theraven, vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6111 llvm-svn: 221518
* [mips] Move SpecialCallingConv to MipsCCState and use it from ↵Daniel Sanders2014-11-071-7/+0
| | | | | | | | | | | | | | | | tablegen-erated code. NFC Summary: In the long run, it should probably become a calling convention in its own right but for now just move it out of MipsISelLowering::analyzeCallOperands() so that we can drop this function in favour of CCState::AnalyzeCallOperands(). Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6085 llvm-svn: 221517
* [mips] Removed IsVarArg from MipsISelLowering::analyzeCallOperands(). NFC.Daniel Sanders2014-11-071-1/+1
| | | | | | | | | | | Summary: CCState objects already carry this information in their isVarArg() method. Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6084 llvm-svn: 221516
* [mips] Removed IsSoftFloat from MipsISelLowering::analyzeCallOperands(). NFCDaniel Sanders2014-11-061-2/+1
| | | | | | | | | | | | | | | | | Summary: It isn't used anymore. Depends on D6081 Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6083 llvm-svn: 221463
* [mips] Removed MipsISelLowering::analyzeFormalArguments() in favour of ↵Daniel Sanders2014-11-061-3/+0
| | | | | | | | | | | | | | | | | | | CCState::AnalyzeFormalArguments() Summary: As with returns, we must be able to identify f128 arguments despite them being lowered away. We do this with a pre-analyze step that builds a vector and then we use this vector from the tablegen-erated code. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D6081 llvm-svn: 221461
* [mips] Add the following MIPS options that control gp-relative addressing ofSasa Stankovic2014-11-061-0/+15
| | | | | | | | | small data items: -mgpopt, -mlocal-sdata, -mextern-sdata. Implement gp-relative addressing for constants. Differential Revision: http://reviews.llvm.org/D4903 llvm-svn: 221450
* [mips] Remove unused prototype and variable. NFC.Daniel Sanders2014-11-031-4/+0
| | | | llvm-svn: 221146
* Re-commit r221056 and others with fix, "[mips] Move F128 argument handling ↵Daniel Sanders2014-11-021-34/+7
| | | | | | | | | into MipsCCState as we did for returns. NFC." sret arguments can never originate from an f128 argument so we detect sret arguments and push false into OriginalArgWasF128. llvm-svn: 221102
* Revert r221056 and others, "[mips] Move F128 argument handling into ↵NAKAMURA Takumi2014-11-021-7/+34
| | | | | | | | | | | | | MipsCCState as we did for returns. NFC." r221056 "[mips] Move F128 argument handling into MipsCCState as we did for returns. NFC." r221058 "[mips] Fix unused variable warning introduced in r221056" r221059 "[mips] Move all ByVal handling into CCState and tablegen-erated code. NFC." r221061 "Renamed CCState members that appear to misspell 'Processed' as 'Proceed'. NFC." It cuased an undefined behavior in LLVM :: CodeGen/Mips/return-vector.ll. llvm-svn: 221081
* [mips] Move all ByVal handling into CCState and tablegen-erated code. NFC.Daniel Sanders2014-11-011-33/+7
| | | | | | | | | | | | | | | | | Summary: CCState already contains a byval implementation that is very similar to the Mips custom code. This patch merges the custom code into the existing common code and tablegen-erated code. Reviewers: vmedic Reviewed By: vmedic Subscribers: rnk, llvm-commits Differential Revision: http://reviews.llvm.org/D5977 llvm-svn: 221059
* [mips] Remove ByValArgInfo::Address in favour of ↵Daniel Sanders2014-11-011-9/+8
| | | | | | | | | | | | | | | | CCValAssign::getMemLocOffset(). NFC. Summary: ByValArgInfo is practically the same as CCState::ByValInfo now. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5976 llvm-svn: 221057
* [mips] Move F128 argument handling into MipsCCState as we did for returns. NFC.Daniel Sanders2014-11-011-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: There are a couple more changes to make before analyzeFormalArguments can be merged into the standard AnalyzeFormalArguments. I've had to temporarily poke a couple holes in MipsCCState's encapsulation to save having to make all the required changes for this merge all at once*. These will be removed shortly. * We must merge our ByVal argument handling with the implementation in CCState. This will be done over the next three patches, then the fourth will merge analyzeFormalArguments with AnalyzeFormalArguments. Depends on D5967 Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5969 llvm-svn: 221056
* [mips] Remove MipsCC::CCInfo. NFC.Daniel Sanders2014-11-011-9/+9
| | | | | | | | | | | | | | | | | | | Summary: It's now passed in as an argument to functions that need it. Eventually this argument will be replaced by the 'this' pointer for a MipsCCState object. Depends on D5966 Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5967 llvm-svn: 221054
* [mips] Removed MipsCC::fixedArgFn(). NFCDaniel Sanders2014-11-011-8/+3
| | | | | | | | | | | | | | | | | | | Summary: There is one remaining trace of it in MipsCC::analyzeCallOperands() where Mips16 might override the calling convention. This will moved into tablegen-erated code later. Depends on D5965 Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5966 llvm-svn: 221053
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