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* Separate MIPS asmprinterAnton Korobeynikov2009-04-031-578/+0
| | | | llvm-svn: 68383
* CodeGen still defaults to non-verbose asm, but llc now overrides it and ↵Evan Cheng2009-03-251-4/+4
| | | | | | default to verbose. llvm-svn: 67668
* It makes no sense to have a ODR version of commonDuncan Sands2009-03-111-2/+1
| | | | | | linkage, so remove it. llvm-svn: 66690
* Introduce new linkage types linkonce_odr, weak_odr, common_odrDuncan Sands2009-03-071-4/+7
| | | | | | | | | | | | | | | | | | | | | and extern_weak_odr. These are the same as the non-odr versions, except that they indicate that the global will only be overridden by an *equivalent* global. In C, a function with weak linkage can be overridden by a function which behaves completely differently. This means that IP passes have to skip weak functions, since any deductions made from the function definition might be wrong, since the definition could be replaced by something completely different at link time. This is not allowed in C++, thanks to the ODR (One-Definition-Rule): if a function is replaced by another at link-time, then the new function must be the same as the original function. If a language knows that a function or other global can only be overridden by an equivalent global, it can give it the weak_odr linkage type, and the optimizers will understand that it is alright to make deductions based on the function body. The code generators on the other hand map weak and weak_odr linkage to the same thing. llvm-svn: 66339
* Overhaul my earlier submission due to feedback. It's a large patch, but most ofBill Wendling2009-02-241-8/+9
| | | | | | | | | | | | them are generic changes. - Use the "fast" flag that's already being passed into the asm printers instead of shoving it into the DwarfWriter. - Instead of calling "MI->getParent()->getParent()" for every MI, set the machine function when calling "runOnMachineFunction" in the asm printers. llvm-svn: 65379
* Put code that generates debug labels into TableGen so that it can be used byBill Wendling2009-02-181-0/+1
| | | | | | everyone. llvm-svn: 64978
* Add the private linkage.Rafael Espindola2009-01-151-7/+8
| | | | llvm-svn: 62279
* Rename getABITypeSize to getTypePaddedSize, asDuncan Sands2009-01-121-1/+1
| | | | | | suggested by Chris. llvm-svn: 62099
* Switch the MachineOperand accessors back to the short names likeDan Gohman2008-10-031-7/+5
| | | | | | isReg, etc., from isRegister, etc. llvm-svn: 57006
* Rename isWeakForLinker to mayBeOverridden. Use itDuncan Sands2008-09-291-1/+1
| | | | | | | instead of hasWeakLinkage in a bunch of optimization passes. llvm-svn: 56782
* Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.Anton Korobeynikov2008-09-241-3/+2
| | | | llvm-svn: 56573
* Drop obsolete hook and change all usage to new interfaceAnton Korobeynikov2008-09-241-6/+0
| | | | llvm-svn: 56572
* Use raw_ostream throughout the AsmPrinter.Owen Anderson2008-08-211-5/+5
| | | | llvm-svn: 55092
* Removed SELECT_CC custom lowering. This is not needed anymore, the SELECT nodeBruno Cardoso Lopes2008-08-131-6/+12
| | | | | | | | | | | | | | | | is lowered properly and covers everything LowerSELECT_CC did. Added method printUnsignedImm in AsmPrinter to print uimm16 operands. This avoid the ugly instruction by instruction checking in printOperand. Added a swap instruction present in the allegrex core. Added two conditional instructions present in the allegrex core : MOVZ and MOVN. They both allow a more efficient SELECT operation for integers. Also added SELECT patterns to optimize MOVZ and MOVN usage. The brcond and setcc patterns were cleaned: redundant and suboptimal patterns were removed. The suboptimals were replaced by more efficient ones. Fixed some instructions that were using immZExt16 instead of immSExt16. llvm-svn: 54724
* Handle visibility printing with all generality. Remove bunch of duplicate code.Anton Korobeynikov2008-08-081-2/+4
| | | | llvm-svn: 54540
* Use EmitAlignment consistentlyAnton Korobeynikov2008-08-071-3/+2
| | | | llvm-svn: 54456
* Added support for fp callee saved registers.Bruno Cardoso Lopes2008-08-061-54/+27
| | | | | | | | | | | | | | | | | | | | | Added fp register clobbering during calls. Added AsmPrinter support for "fmask", a bitmask that indicates where on the stack the fp callee saved registers are. Fixed the stack frame layout for Mips, now the callee saved regs are in the right stack location (a little documentation about how this stack frame must look like is present in MipsRegisterInfo.cpp). This was done using the method MipsRegisterInfo::adjustMipsStackFrame To be more clear, these are examples of what is solves : 1) FP and RA are also callee saved, and despite they aren't in CSI they must be saved before the fp callee saved registers. 2) The ABI requires that local varibles are allocated before the callee saved register area, the opposite behavior from the default allocation. 3) CPU and FPU saved register area must be aligned independent of each other. llvm-svn: 54403
* Improved asm inline for hi,lo resultsBruno Cardoso Lopes2008-08-021-0/+15
| | | | | | | | Added hi,lo registers to be used,def implicitly. This provides better handle of instructions which use hi/lo. Fixes a small BranchAnalysis bug llvm-svn: 54274
* Added floating point lowering for setcc and brcond.Bruno Cardoso Lopes2008-07-281-11/+7
| | | | | | | Fixed COMM asm directive usage. ConstantPool using custom FourByteConstantSection. llvm-svn: 54139
* Added initial support for small sections on Mips.Bruno Cardoso Lopes2008-07-211-3/+8
| | | | | | | Added gp_rel relocations to support addressing small section contents. Added command line to specify small section threshold in bytes. llvm-svn: 53869
* Use chars, where possibleAnton Korobeynikov2008-07-191-25/+25
| | | | llvm-svn: 53791
* Switch MIPS to new ELFTargetAsmInfo. Add few FIXMEs.Anton Korobeynikov2008-07-191-135/+108
| | | | llvm-svn: 53790
* Fixed call stack alignment. Improved AsmPrinter alignment issues.Bruno Cardoso Lopes2008-07-151-10/+36
| | | | llvm-svn: 53585
* Added Subtarget support into RegisterInfoBruno Cardoso Lopes2008-07-141-53/+79
| | | | | | | | | | | | Added HasABICall and HasAbsoluteCall (equivalent to gcc -mabicall and -mno-shared). HasAbsoluteCall is not implemented but HasABICall is the default for o32 ABI. Now, both should help into a more accurate relocation types implementation. Added IsLinux is needed to choose between asm directives. Instruction name strings cleanup. AsmPrinter improved. llvm-svn: 53551
* Fixe typos and 80 column size problemsBruno Cardoso Lopes2008-07-091-3/+3
| | | | llvm-svn: 53272
* Several changes to Mips backend, experimental fp support being the mostBruno Cardoso Lopes2008-07-051-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | important. - Cleanup in the Subtarget info with addition of new features, not all support yet, but they allow the future inclusion of features easier. Among new features, we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit integer and float registers, allegrex vector FPU (VFPU), single float only support. - TargetMachine now detects allegrex core. - Added allegrex (Mips32r2) sext_inreg instructions. - *Added Float Point Instructions*, handling single float only, and aliased accesses for 32-bit FPUs. - Some cleanup in FP instruction formats and FP register classes. - Calling conventions improved to support mips 32-bit EABI. - Added Asm Printer support for fp cond codes. - Added support for sret copy to a return register. - EABI support added into LowerCALL and FORMAL_ARGS. - MipsFunctionInfo now keeps a virtual register per function to track the sret on function entry until function ret. - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...), FP cond codes mapping and initial FP Branch Analysis. - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond, FPCmp - MipsTargetLowering : handling different FP classes, Allegrex support, sret return copy, no homing location within EABI, non 32-bit stack objects arguments, and asm constraint for float. llvm-svn: 53146
* Unneeded include's.Evan Cheng2008-06-191-1/+0
| | | | llvm-svn: 52478
* Some Mips minor fixesBruno Cardoso Lopes2008-06-041-0/+2
| | | | | | Added support for mips little endian arch => mipsel llvm-svn: 51923
* Add CommonLinkage; currently tentative definitionsDale Johannesen2008-05-141-2/+4
| | | | | | | | | | are represented as "weak", but there are subtle differences in some cases on Darwin, so we need both. The intent is that "common" will behave identically to "weak" unless somebody changes their target to do something else. No functional change as yet. llvm-svn: 51118
* Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ↵Evan Cheng2008-02-281-1/+1
| | | | | | 16-byte boundaries. llvm-svn: 47703
* Final de-tabification.Bill Wendling2008-02-271-5/+5
| | | | llvm-svn: 47663
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-261-3/+3
| | | | | | would have been a Godsend here! llvm-svn: 47625
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-4/+4
| | | | llvm-svn: 46930
* Get rid of the annoying blank lines before labels.Evan Cheng2008-02-021-1/+0
| | | | llvm-svn: 46667
* Add new shorter predicates for testing machine operands for various types: Chris Lattner2007-12-301-3/+3
| | | | | | | | | | | | e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
* Use MachineOperand::getImm instead of MachineOperand::getImmedValue. ↵Chris Lattner2007-12-301-2/+2
| | | | | | Likewise setImmedValue -> setImm llvm-svn: 45453
* Remove attribution from file headers, per discussion on llvmdev.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45418
* Added JumpTable supportBruno Cardoso Lopes2007-11-121-25/+57
| | | | | | | Fixed some AsmPrinter issues Added GLOBAL_OFFSET_TABLE Node handle. llvm-svn: 44024
* Added support for PIC code with "explicit relocations" *only*.Bruno Cardoso Lopes2007-11-051-7/+37
| | | | | | | Removed all macro code for PIC (goodbye "la"). Support tested with shootout bench. llvm-svn: 43697
* Eliminate the remaining uses of getTypeSize. ThisDuncan Sands2007-11-051-2/+2
| | | | | | | | | | | | | | should only effect x86 when using long double. Now 12/16 bytes are output for long double globals (the exact amount depends on the alignment). This brings globals in line with the rest of LLVM: the space reserved for an object is now always the ABI size. One tricky point is that only 10 bytes should be output for long double if it is a field in a packed struct, which is the reason for the additional argument to EmitGlobalConstant. llvm-svn: 43688
* Revert 42908 for now.Evan Cheng2007-10-141-1/+1
| | | | llvm-svn: 42960
* Change the names used for internal labels to use the currentDan Gohman2007-10-121-1/+1
| | | | | | | | | function symbol name instead of a codegen-assigned function number. Thanks Evan! :-) llvm-svn: 42908
* Position Independent Code (PIC) support [2]Bruno Cardoso Lopes2007-10-091-9/+19
| | | | | | | | | | - Added a function to hold the stack location where GP must be stored during LowerCALL - AsmPrinter now emits directives based on relocation type - PIC_ set to default relocation type (same as GCC) llvm-svn: 42779
* Added "LoadEffective" pattern to handle stack locations.Bruno Cardoso Lopes2007-09-241-4/+11
| | | | | | Fixed some comments llvm-svn: 42271
* Mask directive completed with CalleeSave infoBruno Cardoso Lopes2007-08-281-71/+110
| | | | | | Comments for Mips directives added. llvm-svn: 41526
* Couple of small changes. Delay Slot handle header declared. Bruno Cardoso Lopes2007-08-181-1/+1
| | | | | | Newline added after macros at function init on generated asm! llvm-svn: 41157
* Don't ignore the return value of AsmPrinter::doInitialization andDan Gohman2007-07-251-2/+1
| | | | | | AsmPrinter::doFinalization. llvm-svn: 40487
* Added support for Mips specific GAS directivesBruno Cardoso Lopes2007-07-111-19/+158
| | | | | | | Fixed print immediate Fixed Identation on MipsISelDAGToDAG.cpp llvm-svn: 39764
* Initial Mips support, here we go! =)Bruno Cardoso Lopes2007-06-061-0/+294
- Modifications from the last patch included (issues pointed by Evan Cheng are now fixed). - Added more MipsI instructions. - Added more patterns to match branch instructions. llvm-svn: 37461
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