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path: root/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
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* Re-commit r221056 and others with fix, "[mips] Move F128 argument handling ↵Daniel Sanders2014-11-021-4/+3
| | | | | | | | | into MipsCCState as we did for returns. NFC." sret arguments can never originate from an f128 argument so we detect sret arguments and push false into OriginalArgWasF128. llvm-svn: 221102
* Revert r221056 and others, "[mips] Move F128 argument handling into ↵NAKAMURA Takumi2014-11-021-3/+4
| | | | | | | | | | | | | MipsCCState as we did for returns. NFC." r221056 "[mips] Move F128 argument handling into MipsCCState as we did for returns. NFC." r221058 "[mips] Fix unused variable warning introduced in r221056" r221059 "[mips] Move all ByVal handling into CCState and tablegen-erated code. NFC." r221061 "Renamed CCState members that appear to misspell 'Processed' as 'Proceed'. NFC." It cuased an undefined behavior in LLVM :: CodeGen/Mips/return-vector.ll. llvm-svn: 221081
* [mips] Move all ByVal handling into CCState and tablegen-erated code. NFC.Daniel Sanders2014-11-011-4/+3
| | | | | | | | | | | | | | | | | Summary: CCState already contains a byval implementation that is very similar to the Mips custom code. This patch merges the custom code into the existing common code and tablegen-erated code. Reviewers: vmedic Reviewed By: vmedic Subscribers: rnk, llvm-commits Differential Revision: http://reviews.llvm.org/D5977 llvm-svn: 221059
* [mips] For indirect calls we don't need $gp to point to .got. Mips linkerSasa Stankovic2014-10-011-2/+4
| | | | | | | | | doesn't generate lazy binding stub for a function whose address is taken in the program. Differential Revision: http://reviews.llvm.org/D5067 llvm-svn: 218744
* Fix spelling and reflow comments.Eric Christopher2014-09-291-6/+5
| | | | llvm-svn: 218631
* constify the TargetMachine being passed through the Mips subtargetEric Christopher2014-09-191-2/+2
| | | | | | creation. llvm-svn: 218169
* Reinstate "Nuke the old JIT."Eric Christopher2014-09-021-0/+2
| | | | | | | | Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reinstates commits r215111, 215115, 215116, 215117, 215136. llvm-svn: 216982
* Fix typos:Sylvestre Ledru2014-08-111-1/+1
| | | | | | | * libaries => libraries * avaiable => available llvm-svn: 215366
* Temporarily Revert "Nuke the old JIT." as it's not quite ready toEric Christopher2014-08-071-2/+0
| | | | | | | | | | | be deleted. This will be reapplied as soon as possible and before the 3.6 branch date at any rate. Approved by Jim Grosbach, Lang Hames, Rafael Espindola. This reverts commits r215111, 215115, 215116, 215117, 215136. llvm-svn: 215154
* Nuke the old JIT.Rafael Espindola2014-08-071-0/+2
| | | | | | | | | I am sure we will be finding bits and pieces of dead code for years to come, but this is a good start. Thanks to Lang Hames for making MCJIT a good replacement! llvm-svn: 215111
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-7/+14
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Add alignment value to allowsUnalignedMemoryAccessMatt Arsenault2014-07-271-3/+4
| | | | | | | | | | Rename to allowsMisalignedMemoryAccess. On R600, 8 and 16 byte accesses are mostly OK with 4-byte alignment, and don't need to be split into multiple accesses. Vector loads with an alignment of the element type are not uncommon in OpenCL code. llvm-svn: 214055
* In preparation for replacing the whole subtarget on the target machine,Eric Christopher2014-07-181-4/+6
| | | | | | have target lowering take the subtarget explicitly. llvm-svn: 213426
* The subtarget in MipsTargetLowering isn't going to change andEric Christopher2014-07-181-1/+1
| | | | | | so doesn't need to be a pointer, but a reference. llvm-svn: 213422
* Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachineEric Christopher2014-07-181-1/+1
| | | | | | | | | | Options struct and move the comment to inMips16HardFloat. Use the fact that we now know whether or not we cared about soft float to set the libcalls. Accordingly rename mipsSEUsesSoftFloat to abiUsesSoftFloat and propagate since it's no longer CPU specific. llvm-svn: 213335
* Remove dead code.Eric Christopher2014-07-031-7/+0
| | | | llvm-svn: 212244
* Target: change member from reference to pointerSaleem Abdulrasool2014-05-171-3/+3
| | | | | | | | | This is a preliminary step to help ease the construction of CallLoweringInfo. Changing the construction to a chained function pattern requires that the parameter be nullable. However, rather than copying the vector, save a pointer rather than the reference to permit a late binding of the arguments. llvm-svn: 209080
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-2/+2
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Retire llvm::array_endof in favor of non-member std::end.Benjamin Kramer2014-04-121-11/+10
| | | | | | While there make array_lengthof constexpr if we have support for it. llvm-svn: 206112
* [cleanup] Re-sort all the includes with utils/sort_includes.py.Chandler Carruth2014-03-041-1/+1
| | | | llvm-svn: 202811
* [C++11] Replace llvm::next and llvm::prior with std::next and std::prev.Benjamin Kramer2014-03-021-6/+3
| | | | | | Remove the old functions. llvm-svn: 202636
* Make one statement easier to understand from post commmit feedback from aReed Kotler2014-02-191-1/+1
| | | | | | review of the previous patch that introduced this week. llvm-svn: 201723
* This patch has two main functions:Reed Kotler2014-02-141-3/+27
| | | | | | | | | | | | | | | | | 1) Fix a specific bug when certain conversion functions are called in a program compiled as mips16 with hard float and the program is linked as c++. There are two libraries that are reversed in the link order with gcc/g++ and clang/clang++ for mips16 in this case and the proper stubs will then not be called. These stubs are normally handled in the Mips16HardFloat pass but in this case we don't know at that time that we need to generate the stubs. This must all be handled later in code generation and we have moved this functionality to MipsAsmPrinter. When linked as C (gcc or clang) the proper stubs are linked in from libc. 2) Set up the infrastructure to handle 90% of what is in the Mips16HardFloat pass in this new area of MipsAsmPrinter. This is a more logical place to handle this and we have known for some time that we needed to move the code later and not implement it using inline asm as we do now but it was not clear exactly where to do this and what mechanism should be used. Now it's clear to us how to do this and this patch contains the infrastructure to move most of this to MipsAsmPrinter but the actual moving will be done in a follow on patch. The same infrastructure is used to fix this current bug as described in #1. This change was requested by the list during the original putback of the Mips16HardFloat pass but was not practical for us do at that time. llvm-svn: 201426
* Add address space argument to allowsUnalignedMemoryAccess.Matt Arsenault2014-02-051-1/+3
| | | | | | | On R600, some address spaces have more strict alignment requirements than others. llvm-svn: 200887
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-1/+1
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* [Mips] Does not take in account 'use-soft-float' attribute's value whenSimon Atanasyan2013-12-251-2/+1
| | | | | | | | consider to generate stubs for mips16 hard-float mode. The patch reviewed by Reed Kotler. llvm-svn: 198019
* Make all the conditional Mips 16 branches get initially set for theReed Kotler2013-11-151-24/+24
| | | | | | | | | | short form. Constant islands will expand them if they are out of range. Since there is not direct object emitter at this time, it does not have any material affect because the assembler sorts this out. But we need to know for the actual constant island work. We track the difference by putting # 16 inst in the comments. llvm-svn: 194766
* Let rotr and bswap be handled by expansion for Mips16 since we don'tReed Kotler2013-10-081-0/+5
| | | | | | have native instructions for this. llvm-svn: 192207
* [mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted outAkira Hatanaka2013-09-281-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | of loops. Previously, two consecutive calls to function "func" would result in the following sequence of instructions: 1. load $16, %got(func)($gp) // load address of lazy-binding stub. 2. move $25, $16 3. jalr $25 // jump to lazy-binding stub. 4. nop 5. move $25, $16 6. jalr $25 // jump to lazy-binding stub again. With this patch, the second call directly jumps to func's address, bypassing the lazy-binding resolution routine: 1. load $25, %got(func)($gp) // load address of lazy-binding stub. 2. jalr $25 // jump to lazy-binding stub. 3. nop 4. load $25, %got(func)($gp) // load resolved address of func. 5. jalr $25 // directly jump to func. llvm-svn: 191591
* [mips] Rewrite MipsTargetLowering::getAddr functions as template functions.Akira Hatanaka2013-09-271-1/+3
| | | | | | No intended functionality change. llvm-svn: 191546
* Revert r191350.Akira Hatanaka2013-09-251-3/+1
| | | | llvm-svn: 191353
* [mips] Define getTargetNode as a template function.Akira Hatanaka2013-09-251-1/+3
| | | | | | No intended functionality change. llvm-svn: 191350
* Add another intrinsic that LLVM gives an incorrect prototype to.Reed Kotler2013-08-091-0/+1
| | | | | | | | I need to go through all the runtime routine list and see if there are any more I need to add for mips16 floating point. Prototypes must be correct or else I don't know to add a helper function call. llvm-svn: 188106
* [mips] Rename register classes CPURegs and CPU64Regs.Akira Hatanaka2013-08-061-1/+1
| | | | llvm-svn: 187832
* Fix some issues with Mips16 floating when certain intrinsics are present.Reed Kotler2013-08-011-0/+52
| | | | | | | | | | | | | | | This is actually an LLVM bug in the way it generates signatures for these when soft float is enabled. For example, floor ends up having the signature of int64(int64). The signature part is not the same as where the actual parameter types are recorded, and those ARE of course int64(int64) when soft float is enabled. (Yes, Mips16 hard float uses soft float but with different runtime rounes but then has to interoperate with Mips32 using normal floating point). This logic will eventually be moved to the Mips16HardFloat pass so it's not worth sorting out these issues in LLVM since nobody but Mips16 cares about these signatures, as far as I know, and even I won't eventually either. llvm-svn: 187613
* Mips: Remove global set.Benjamin Kramer2013-06-131-55/+68
| | | | | | Backends shouldn't retain any global state. No functionality change. llvm-svn: 183927
* Fix a regression I introduced when I expanded the complex pseudos inReed Kotler2013-06-091-8/+9
| | | | | | | | | the Mips16 port. A few of the psuedos could either take signed or unsigned arguments and I did not distinguish the case and improperly rejected some valid cases that the assembler had previously accepted when they were pure pseudos that expanded as assembly instructions. llvm-svn: 183633
* Add some additional functions to the list of helper functions forReed Kotler2013-05-211-2/+13
| | | | | | | | | | pic calls. These need to be there so we don't try and use helper functions when we call those. As part of this, make sure that we properly exclude helper functions in pic mode when indirect calls are involved. llvm-svn: 182343
* Checkin in of first of several patches to finish implementation ofReed Kotler2013-05-101-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mips16/mips32 floating point interoperability. This patch fixes returns from mips16 functions so that if the function was in fact called by a mips32 hard float routine, then values that would have been returned in floating point registers are so returned. Mips16 mode has no floating point instructions so there is no way to load values into floating point registers. This is needed when returning float, double, single complex, double complex in the Mips ABI. Helper functions in libc for mips16 are available to do this. For efficiency purposes, these helper functions have a different calling convention from normal Mips calls. Registers v0,v1,a0,a1 are used to pass parameters instead of a0,a1,a2,a3. This is because v0,v1,a0,a1 are the natural registers used to return floating point values in soft float. These values can then be moved to the appropriate floating point registers with no extra cost. The only register that is modified is ra in this call. The helper functions make sure that the return values are in the floating point registers that they would be in if soft float was not in effect (which it is for mips16, though the soft float is implemented using a mips32 library that uses hard float). llvm-svn: 181641
* 80 columns.Akira Hatanaka2013-04-221-2/+4
| | | | llvm-svn: 180040
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-201-1/+0
| | | | llvm-svn: 179939
* Add a new method which enables one to change register classes.Reed Kotler2013-03-141-0/+8
| | | | | | | | | | | | See the Mips16ISetLowering.cpp patch to see a use of this. For now now the extra code in Mips16ISetLowering.cpp is a nop but is used for test purposes. Mips32 registers are setup and then removed and then the Mips16 registers are setup. Normally you need to add register classes and then call computeRegisterProperties. llvm-svn: 177120
* [mips] Define two subclasses of MipsTargetLowering. Mips16TargetLowering is forAkira Hatanaka2013-03-131-0/+681
mips16 and MipsSETargetLowering is for mips32/64. No functionality changes. llvm-svn: 176917
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