summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips/MCTargetDesc
Commit message (Collapse)AuthorAgeFilesLines
...
* [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal ↵Daniel Sanders2014-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | is a normal instruction Summary: b(ge|lt)zal have been removed in MIPS32r6/MIPS64r6. However, bal (an alias for 'bgezal $zero, $offset') still remains with the same encoding it had prior to MIPS32r6/MIPS64r6. Updated the MipsNaCLELFStreamer, and MipsLongBranch to correctly handle the MIPS32r6/MIPS64r6 BAL instruction in addition to the existing BAL_BR pseudo. No changes were required to the CodeGen test that looks for BAL (test/CodeGen/Mips/longbranch.ll) since the new instruction has the same syntax. Depends on D4113 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4114 llvm-svn: 210898
* [mips][mips64r6] Add R_MIPS_PC19_S2Zoran Jovanovic2014-06-124-5/+30
| | | | | | Differential Revision: http://reviews.llvm.org/D3866 llvm-svn: 210773
* [mips] Fix a bug for NaCl target - Don't report the error when non-dangerousSasa Stankovic2014-06-091-7/+6
| | | | | | | | load/store is in branch delay slot. Differential Revision: http://llvm-reviews.chandlerc.com/D4048 llvm-svn: 210470
* [mips][mips64r6] Add LDPC instructionZoran Jovanovic2014-06-092-0/+15
| | | | | | Differential Revision: http://reviews.llvm.org/D3822 llvm-svn: 210460
* [mips][mips64r6] Add Relocations R_MIPS_PCHI16, R_MIPS_PCLO16 Zoran Jovanovic2014-05-274-0/+24
| | | | | | Differential Revision: http://reviews.llvm.org/D3860 llvm-svn: 209659
* [mips][mips64r6] Add relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2 Zoran Jovanovic2014-05-274-2/+38
| | | | | | Differential Revision: http://reviews.llvm.org/D3824 llvm-svn: 209655
* [mips] Work around inconsistency in llvm-mc's placement of fixup markersDaniel Sanders2014-05-231-2/+62
| | | | | | | | | | | | | | | | | | | Summary: Add a second fixup table to MipsAsmBackend::getFixupKindInfo() to correctly position llvm-mc's fixup placeholders for big-endian. See PR19836 for full details of the issue. To summarize, the fixup placeholders do not account for endianness properly and the implementations of getFixupKindInfo() for each target are measuring MCFixupKindInfo.TargetOffset from different ends of the instruction encoding to compensate. Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3889 llvm-svn: 209514
* [mips][mips64r6] Add Compact indexed jumps.Zoran Jovanovic2014-05-162-0/+26
| | | | | | Differential Revision: http://reviews.llvm.org/D3707 llvm-svn: 208981
* [mips][mips64r6] Add compact branch instructionsZoran Jovanovic2014-05-162-0/+54
| | | | | | Differential Revision: http://reviews.llvm.org/D3691 llvm-svn: 208974
* [mips][mips64r6] Add addiupc, aluipc, and auipcDaniel Sanders2014-05-152-1/+15
| | | | | | | | | | | | | | | | Summary: No support for symbols in place of the immediate yet since it requires new relocations. Depends on D3671 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3689 llvm-svn: 208858
* Remove the UseCFI option from createAsmStreamer.Rafael Espindola2014-05-071-4/+3
| | | | | | We were already always passing true, this just removes the option. llvm-svn: 208205
* [mips] Move expansion of .cpsetup to target streamer.Matheus Almeida2014-05-011-0/+73
| | | | | | | | | | | | | | | Summary: There are two functional changes: 1) The directive is not expanded for the ASM->ASM code path. 2) If PIC is not set, there's no expansion for the ASM->OBJ code path (same behaviour as GAS). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3482 llvm-svn: 207741
* [mips] Add support for .cpload.Matheus Almeida2014-04-301-0/+54
| | | | | | | | | | | | | | | | | | | | Summary: This directive is used for setting up $gp in the beginning of a function. It expands to three instructions if PIC is enabled: lui $gp, %hi(_gp_disp) addui $gp, $gp, %lo(_gp_disp) addu $gp, $gp, $reg _gp_disp is a special symbol that the linker sets to the distance between the lui instruction and the context pointer (_gp). Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3480 llvm-svn: 207637
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-295-17/+18
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Mips edition llvm-svn: 207506
* [C++] Use 'nullptr'.Craig Topper2014-04-281-1/+1
| | | | llvm-svn: 207394
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-252-2/+2
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-223-5/+6
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* [cleanup] Lift using directives, DEBUG_TYPE definitions, and even someChandler Carruth2014-04-221-2/+2
| | | | | | | | | | | | system headers above the includes of generated '.inc' files that actually contain code. In a few targets this was already done pretty consistently, but it wasn't done *really* consistently anywhere. It is strictly cleaner IMO and necessary in a bunch of places where the DEBUG_TYPE is referenced from the generated code. Consistency with the necessary places trumps. Hopefully the build bots are OK with the movement of intrin.h... llvm-svn: 206838
* [mips] Add initial support for NaN2008 in the back-end.Matheus Almeida2014-04-161-0/+26
| | | | | | | | | | | | This is so that EF_MIPS_NAN2008 is set if we are using IEEE 754-2008 NaN encoding (-mnan=2008). This patch also adds support for parsing '.nan legacy' and '.nan 2008' assembly directives. The handling of these directives should match GAS' behaviour i.e., the last directive in use sets the ELF header bit (EF_MIPS_NAN2008). Differential Revision: http://reviews.llvm.org/D3346 llvm-svn: 206396
* [mips] Add initial (experimental) MIPS-IV support.Daniel Sanders2014-04-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Summary: Adds the 'mips4' processor and a simple test of the ELF e_flags. Patch by David Chisnall His work was sponsored by: DARPA, AFRL I made one small change to the testcase so that it uses mips64-unknown-linux instead of mips4-unknown-linux. This patch indirectly adds FeatureCondMov to FeatureMips64. This is ok because it's supposed to be there anyway and it turns out that FeatureCondMov is not a predicate of any instructions at the moment (this is a bug that hasn't been noticed because there are no targets without the conditional move instructions yet). CC: theraven Differential Revision: http://llvm-reviews.chandlerc.com/D3244 llvm-svn: 205530
* MicroMIPS specific little endian fixup data byte ordering.Zoran Jovanovic2014-04-031-2/+24
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D3245 llvm-svn: 205528
* [mips] Extend MipsMCExpr class to handle %higher(sym1 - sym2 + const) andSasa Stankovic2014-04-033-16/+62
| | | | | | | | | | | | | | | | | | %highest(sym1 - sym2 + const) relocations. Remove "ABS_" from VK_Mips_HI and VK_Mips_LO enums in MipsMCExpr, to be consistent with VK_Mips_HIGHER and VK_Mips_HIGHEST. This change also deletes test file test/MC/Mips/higher_highest.ll and moves its CHECK's to the new test file test/MC/Mips/higher-highest-addressing.s. The deleted file tests that R_MIPS_HIGHER and R_MIPS_HIGHEST relocations are emitted in the .o file. Since it uses -force-mips-long-branch option, it was created when MipsLongBranch's implementation was emitting R_MIPS_HIGHER and R_MIPS_HIGHEST relocations in the .o file. It was disabled when MipsLongBranch started to directly calculate offsets. Differential Revision: http://llvm-reviews.chandlerc.com/D3230 llvm-svn: 205522
* Don't relocate with sections if there might be a paired relocation.Rafael Espindola2014-03-311-2/+18
| | | | llvm-svn: 205240
* Completely rewrite ELFObjectWriter::RecordRelocation.Rafael Espindola2014-03-294-146/+19
| | | | | | | | | | | | | | | | | | | I started trying to fix a small issue, but this code has seen a small fix too many. The old code was fairly convoluted. Some of the issues it had: * It failed to check if a symbol difference was in the some section when converting a relocation to pcrel. * It failed to check if the relocation was already pcrel. * The pcrel value computation was wrong in some cases (relocation-pc.s) * It was missing quiet a few cases where it should not convert symbol relocations to section relocations, leaving the backends to patch it up. * It would not propagate the fact that it had changed a relocation to pcrel, requiring a quiet nasty work around in ARM. * It was missing comments. llvm-svn: 205076
* Add const.Rafael Espindola2014-03-282-2/+3
| | | | llvm-svn: 205013
* Remove another unused argument.Rafael Espindola2014-03-271-3/+2
| | | | llvm-svn: 204961
* Remove unused argument.Rafael Espindola2014-03-271-5/+3
| | | | llvm-svn: 204956
* The forward declare should be a struct instead of a class (to be consistent ↵Aaron Ballman2014-03-271-1/+1
| | | | | | with the definition, as well as to silence an MSVC C4099 warning). llvm-svn: 204928
* Split the file MipsAsmBackend.cpp in Split the file MipsAsmBackend.cpp and ↵Zoran Jovanovic2014-03-272-195/+241
| | | | | | | | Split the file MipsAsmBackend.h. Differential Revision: http://llvm-reviews.chandlerc.com/D3134 llvm-svn: 204921
* [mips] Remove unused private field.Matheus Almeida2014-03-271-2/+1
| | | | llvm-svn: 204919
* [mips] NaCl should now use the custom MipsELFStreamer (recently added) in spiteMatheus Almeida2014-03-273-14/+18
| | | | | | | | | | | | | | of MCELFStreamer. This is so that changes to MipsELFStreamer will automatically propagate through its subclasses. No functional changes (MipsELFStreamer has the same functionality of MCELFStreamer at the moment). Differential Revision: http://llvm-reviews.chandlerc.com/D3130 llvm-svn: 204918
* [mips] Implement custom MCELFStreamer.Matheus Almeida2014-03-274-1/+66
| | | | | | | | | | | | | This allows us to insert some hooks before emitting data into an actual object file. For example, we can capture the register usage for a translation unit by overriding the EmitInstruction method. The register usage information is needed to generate .reginfo and .Mips.options ELF sections. No functional changes. Differential Revision: http://llvm-reviews.chandlerc.com/D3129 llvm-svn: 204917
* [mips] Add support to '.set mips64'.Matheus Almeida2014-03-261-0/+8
| | | | | | | | | | The '.set mips64' directive enables the feature Mips:FeatureMips64 from assembly. Note that it doesn't modify the ELF header as opposed to the use of -mips64 from the command-line. The reason for this is that we want to be as compatible as possible with existing assemblers like GAS. llvm-svn: 204817
* [mips] Add support to '.set mips64r2'.Matheus Almeida2014-03-261-0/+8
| | | | | | | | | | The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2 from assembly. Note that it doesn't modify the ELF header as opposed to the use of -mips64r2 from the command-line. The reason for this is that we want to be as compatible as possible with existing assemblers like GAS. llvm-svn: 204815
* [mips] Add support for '.option pic2'.Matheus Almeida2014-03-261-0/+21
| | | | | | | | | The directive '.option pic2' enables PIC from assembly source. At the moment none of the macros/directives check the PIC bit but that's going to be fixed relatively soon. For example, the expansion of macros like 'la' depend on the relocation model. llvm-svn: 204803
* [mips] Update namespace.Matheus Almeida2014-03-211-5/+1
| | | | | | | We should be using the llvm namespace and not an anonymous namespace in a header file. llvm-svn: 204450
* Mark alias symbols as microMIPS if necessary. Differential Revision: ↵Zoran Jovanovic2014-03-201-0/+20
| | | | | | http://llvm-reviews.chandlerc.com/D3080 llvm-svn: 204323
* [mips] Splitting up class definition from implementation.Matheus Almeida2014-03-202-129/+171
| | | | | | | | Also removed some unnecessary #includes. No functional changes. llvm-svn: 204320
* [mips] 80-column.Matheus Almeida2014-03-191-8/+12
| | | | llvm-svn: 204252
* Try harder to evaluate expressions when printing assembly.Rafael Espindola2014-03-121-3/+1
| | | | | | | | | When printing assembly we don't have a Layout object, but we can still try to fold some constants. Testcase by Ulrich Weigand. llvm-svn: 203677
* [mips] Implement NaCl sandboxing of function calls:Sasa Stankovic2014-03-111-2/+56
| | | | | | | | | * Add masking instructions before indirect calls (in MC layer). * Align call + branch delay to the bundle end (in MC layer). Differential Revision: http://llvm-reviews.chandlerc.com/D3032 llvm-svn: 203606
* [mips] Implement NaCl sandboxing of loads, stores and SP changes:Sasa Stankovic2014-03-102-5/+110
| | | | | | | | | | * Add masking instructions before loads and stores (in MC layer). * Add masking instructions after SP changes (in MC layer). * Forbid loads, stores and SP changes in delay slots (in MI layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2904 llvm-svn: 203484
* This patch implements .set dsp directive and sets appropriate feature ↵Vladimir Medic2014-03-051-0/+7
| | | | | | bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file. llvm-svn: 202966
* [cleanup] Re-sort all the includes with utils/sort_includes.py.Chandler Carruth2014-03-043-4/+4
| | | | llvm-svn: 202811
* This patch implements .set mips32r2 directive and sets appropriate feature ↵Vladimir Medic2014-03-041-0/+8
| | | | | | bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file. llvm-svn: 202807
* [mips] support FK_Data_2 and FK_Data_8 to fix big-endian debug dataEd Maste2014-03-031-0/+4
| | | | | | | | | This fixes invalid lengths in .debug_aranges on big-endian mips64 (lengths appear to be left-shifted by 32 bits) and in .debug_loc. Differential Revision: http://llvm-reviews.chandlerc.com/D2517 llvm-svn: 202716
* Reorder Mips/MCTargetDesc/CMakeLists.txt.NAKAMURA Takumi2014-02-281-1/+1
| | | | llvm-svn: 202483
* [mips] Add MipsNaClELFStreamer.cpp to CMakeLists.txt.Sasa Stankovic2014-02-281-0/+1
| | | | llvm-svn: 202482
* [mips] Implement NaCl sandboxing of indirect jumps:Sasa Stankovic2014-02-283-3/+133
| | | | | | | | | * Align targets of indirect jumps to instruction bundle boundaries (in MI layer). * Add masking instructions before indirect jumps (in MC layer). Differential Revision: http://llvm-reviews.chandlerc.com/D2847 llvm-svn: 202479
* [mips] Treat -mcpu=generic the same way as an empty CPU string.Daniel Sanders2014-02-261-1/+1
| | | | | | | | | | | | | | | | | Summary: This should fix the MCJIT unit tests that were broken by r201792 on the MIPS buildbot. MIPS currently uses the default implementation of sys::getHostCPUName() which always returns "generic". For now, we will accept "generic" and coerce it to "mips32" or "mips64" depending on the target architecture like we do for empty CPU names. Reviewers: jacksprat, matheusalmeida Reviewed By: jacksprat Differential Revision: http://llvm-reviews.chandlerc.com/D2878 llvm-svn: 202253
OpenPOWER on IntegriCloud