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* [mips] Make isel select the correct DEXT variant up front.Daniel Sanders2016-02-291-18/+11
| | | | | | | | | | | | | | | | | Summary: Previously, it would always select DEXT and substitute any invalid matches for DEXTU/DEXTM during MipsMCCodeEmitter::encodeInstruction(). This works but causes problems when adding range checked immediates to IAS. Now isel selects the correct variant up front. Reviewers: vkalintiris Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D16810 llvm-svn: 262229
* [mips] Removed the SHF_ALLOC flag and the SHT_REL flag from the .pdr section.Scott Egerton2016-02-171-2/+1
| | | | | | | | | | | | This section is used for debug information and has no need to be in memory at runtime. This patch also fixes an error when compiling the Linux kernel. The error is that there are relocations within the .pdr section in a VDSO. SHT_REL was removed as it is a section type and not a section flag, therefore it does not make sense for it to be there. With this patch, LLVM now emits the same flags as the GNU assembler. llvm-svn: 261083
* [mips] Implemented the .hword directive.Scott Egerton2016-02-151-0/+1
| | | | | | | | | | | | | | Summary: In order to pass the tests, this required marking R_MIPS_16 relocations as needing to point to the symbol and not the section. Reviewers: vkalintiris, dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D17200 llvm-svn: 260896
* Reverted r260879 as it caused test failures in lld.Scott Egerton2016-02-151-1/+1
| | | | llvm-svn: 260880
* [mips] Removed the SHF_ALLOC flag from the .pdr section.Scott Egerton2016-02-151-1/+1
| | | | | | | | | | | | | | | | | Summary: This section is used for debug information and has no need to be in memory at runtime. With this patch, LLVM now emits the same flags as the GNU assembler. This patch also fixes an error when compiling the Linux kernel, The error is that there are relocations within the .pdr section in a VDSO. Reviewers: vkalintiris, dsanders Subscribers: llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D17199 llvm-svn: 260879
* Remove autoconf supportChris Bieneman2016-01-261-17/+0
| | | | | | | | | | | | | | | | Summary: This patch is provided in preparation for removing autoconf on 1/26. The proposal to remove autoconf on 1/26 was discussed on the llvm-dev thread here: http://lists.llvm.org/pipermail/llvm-dev/2016-January/093875.html "I felt a great disturbance in the [build system], as if millions of [makefiles] suddenly cried out in terror and were suddenly silenced. I fear something [amazing] has happened." - Obi Wan Kenobi Reviewers: chandlerc, grosbach, bob.wilson, tstellarAMD, echristo, whitequark Subscribers: chfast, simoncook, emaste, jholewinski, tberghammer, jfb, danalbert, srhines, arsenm, dschuff, jyknight, dsanders, joker.eph, llvm-commits Differential Revision: http://reviews.llvm.org/D16471 llvm-svn: 258861
* [MC, COFF] Add .reloc support for WinCOFFDavid Majnemer2016-01-192-11/+6
| | | | | | | This adds rudimentary support for a few relocations that we will use for the CodeView debug format. llvm-svn: 258216
* Handle offsets larger than 32 bits.Rafael Espindola2016-01-141-2/+4
| | | | | | | David Majnemer noticed that it was not obvious what the behavior would be if B.Offset - A.Offset could not fit in an int. llvm-svn: 257803
* Assert that a cmp function defines a total order.Rafael Espindola2016-01-141-3/+2
| | | | | | Thanks to David Blaikie for noticing it. llvm-svn: 257796
* Convert a few assert failures into proper errors.Rafael Espindola2016-01-131-3/+4
| | | | | | Fixes PR25944. llvm-svn: 257697
* [mips][microMIPS] Implement DERET and DI instructions and check size operand ↵Zlatko Buljan2015-12-212-12/+0
| | | | | | | | for EXT and DEXT* instructions Differential Revision: http://reviews.llvm.org/D15570 llvm-svn: 256152
* Avoid explicit relocation sorting most of the time.Rafael Espindola2015-12-171-0/+14
| | | | | | | | | | These days relocations are created and stored in a deterministic way. The order they are created is also suitable for the .o file, so we don't need an explicit sort. The last remaining exception is MIPS. llvm-svn: 255902
* Always sort by offset first. NFC.Rafael Espindola2015-12-171-3/+0
| | | | | | | Every target changing sortRelocs was first calling the parent implementation. Just run that first. llvm-svn: 255898
* [mips][microMIPS] Fix issue with offset operand of BALC and BC instructionsZoran Jovanovic2015-11-302-0/+24
| | | | | | | Value of offset operand for microMIPS BALC and BC instructions is currently shifted 2 bits, but it should be 1 bit. Differential Revision: http://reviews.llvm.org/D14770 llvm-svn: 254296
* [mips] .ent and .end should also set the type and size of the symbol ↵Daniel Sanders2015-11-231-1/+17
| | | | | | | | | | | | respectively. Reviewers: vkalintiris Subscribers: llvm-commits, seanbruno, emaste, vkalintiris, dsanders Differential Revision: http://reviews.llvm.org/D14221 llvm-svn: 253875
* [Assembler] Make fatal assembler errors non-fatalOliver Stannard2015-11-171-16/+32
| | | | | | | | | | | | | | Currently, if the assembler encounters an error after parsing (such as an out-of-range fixup), it reports this as a fatal error, and so stops after the first error. However, for most of these there is an obvious way to recover after emitting the error, such as emitting the fixup with a value of zero. This means that we can report on all of the errors in a file, not just the first one. MCContext::reportError records the fact that an error was encountered, so we won't actually emit an object file with the incorrect contents. Differential Revision: http://reviews.llvm.org/D14717 llvm-svn: 253328
* Implement .reloc (constant offset only) with support for R_MIPS_NONE and ↵Daniel Sanders2015-11-124-1/+21
| | | | | | | | | | | | | | | | R_MIPS_32. Summary: Support for R_MIPS_NONE allows us to parse MIPS16's usage of .reloc. R_MIPS_32 was included to be able to better test the directive. Targets can add their relocations by overriding MCAsmBackend::getFixupKind(). Subscribers: grosbach, rafael, majnemer, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D13659 llvm-svn: 252888
* [mips][microMIPS] Implement LWM16, SB16, SH16, SW16, SWSP and SWM16 instructionsZlatko Buljan2015-11-121-0/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D11406 llvm-svn: 252885
* [mips][ias] Range check uimm2 operands and fix a bug this revealed.Daniel Sanders2015-11-062-9/+12
| | | | | | | | | | | | | | | Summary: The bug was that the MIPS32R6/MIPS64R6/microMIPS32R6 versions of LSA and DLSA (unlike the MSA version) failed to account for the off-by-one encoding of the immediate. The range is actually 1..4 rather than 0..3. Reviewers: vkalintiris Subscribers: atanasyan, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D14015 llvm-svn: 252295
* [mips][microMIPS] Implement LB, LBE, LBU and LBUE instructionsHrvoje Varga2015-10-162-1/+17
| | | | | | Differential Revision: http://reviews.llvm.org/D11633 llvm-svn: 250511
* [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE.Daniel Sanders2015-10-151-1/+0
| | | | | | | | | | | | | | | | Summary: The -mcpu=mips16 option caused the Integrated Assembler to crash because it couldn't figure out the architecture revision number to write to the .MIPS.abiflags section. This CPU definition has been removed because, like microMIPS, MIPS16 is an ASE to a base architecture. Reviewers: vkalintiris Subscribers: rkotler, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D13656 llvm-svn: 250407
* [mips][micromips] Initial support for micrmomips DSP instructions and ↵Zoran Jovanovic2015-10-121-0/+4
| | | | | | | | addu.qb implementation Differential Revision: http://reviews.llvm.org/D12798 llvm-svn: 250058
* Change isUIntN/isIntN calls with constant N to use the template version. NFCCraig Topper2015-10-101-8/+8
| | | | llvm-svn: 249952
* Fix pr24486.Rafael Espindola2015-10-051-2/+2
| | | | | | | | | | | | | | | | | | This extends the work done in r233995 so that now getFragment (in addition to getSection) also works for variable symbols. With that the existing logic to decide if a-b can be computed works even if a or b are variables. Given that, the expression evaluation can avoid expanding variables as aggressively and that in turn lets the relocation code see the original variable. In order for this to work with the asm streamer, there is now a dummy fragment per section. It is used to assign a section to a symbol when no other fragment exists. This patch is a joint work by Maxim Ostapenko andy myself. llvm-svn: 249303
* Remove 'const' from some ArrayRefs. ArrayRefs are already immutable. NFCCraig Topper2015-09-282-4/+4
| | | | llvm-svn: 248693
* [mips][ias] Implement .cpreturn directive.Daniel Sanders2015-09-221-0/+32
| | | | | | | | | | | | | | | | | Summary: Based on a patch by David Chisnall. I've modified the original patch as follows: * Moved the expansion to the TargetStreamers so that the directive isn't expanded when emitting assembly. * Fixed an operand order bug. * Changed the move instructions from DADDu to OR to match recent changes to GAS. Reviewers: vkalintiris Subscribers: llvm-commits, emaste, seanbruno, theraven Differential Revision: http://reviews.llvm.org/D13017 llvm-svn: 248258
* [mips] Allow constant expressions in second argument of .cpsetup.Daniel Sanders2015-09-211-1/+1
| | | | | | | | | | | | | | Summary: Also tightened up the test and made a trivial fix to prevent double-newline after emitting .cpsetup directives. Reviewers: vkalintiris Subscribers: seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D12956 llvm-svn: 248143
* Cleanup places that passed SMLoc by const reference to pass it by value ↵Craig Topper2015-09-202-3/+2
| | | | | | instead. NFC llvm-svn: 248135
* [mips] Add assembler support for the .cprestore directive.Daniel Sanders2015-09-171-0/+28
| | | | | | | | | | | | | | | | | | Summary: This assembler directive is used in O32 PIC to restore the current function's $gp after executing JAL's. The $gp is first stored on the stack at a user-specified offset. It has the following format: ".cprestore 8" (where 8 is the offset). This fixes llvm.org/PR20967. Patch by Toma Tabacu. Reviewers: seanbruno, tomatabacu Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D6267 llvm-svn: 247897
* Revert r247692: Replace Triple with a new TargetTuple in MCTargetDesc/* and ↵Daniel Sanders2015-09-158-41/+34
| | | | | | | | related. NFC. Eric has replied and has demanded the patch be reverted. llvm-svn: 247702
* Re-commit r247683: Replace Triple with a new TargetTuple in MCTargetDesc/* ↵Daniel Sanders2015-09-158-34/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | and related. NFC. Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Thanks go to Pavel Labath for fixing LLDB for me. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247692
* Revert r247684 - Replace Triple with a new TargetTuple ...Daniel Sanders2015-09-158-41/+34
| | | | | | LLDB needs to be updated in the same commit. llvm-svn: 247686
* Replace Triple with a new TargetTuple in MCTargetDesc/* and related. NFC.Daniel Sanders2015-09-158-34/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is the first patch in the series to migrate Triple's (which are ambiguous) to TargetTuple's (which aren't). For the moment, TargetTuple simply passes all requests to the Triple object it holds. Once it has replaced Triple, it will start to implement the interface in a more suitable way. This change makes some changes to the public C++ API. In particular, InitMCSubtargetInfo(), createMCRelocationInfo(), and createMCSymbolizer() now take TargetTuples instead of Triples. The other public C++ API's have been left as-is for the moment to reduce patch size. This commit also contains a trivial patch to clang to account for the C++ API change. Reviewers: rengolin Subscribers: jyknight, dschuff, arsenm, rampitec, danalbert, srhines, javed.absar, dsanders, echristo, emaste, jholewinski, tberghammer, ted, jfb, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10969 llvm-svn: 247683
* Fix namespace indentation and missing blank lines before 'public:' in ↵Daniel Sanders2015-09-151-6/+7
| | | | | | | | | | *MCAsmInfo.h. NFC. This is to reduce noise in a following commit. Also fixes a couple missing spaces before the reference operator. llvm-svn: 247679
* [mips][microMIPS] Implement CACHEE and PREFE instructions for microMIPS32r6Zoran Jovanovic2015-09-151-1/+1
| | | | | | Differential Revision: http://reviews.llvm.org/D11632 llvm-svn: 247670
* [mips][microMIPS] Implement SB, SBE, SCE, SH and SHE instructionsZoran Jovanovic2015-09-082-0/+16
| | | | | | Differential Revision: http://reviews.llvm.org/D11801 llvm-svn: 246999
* [mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing ↵Zoran Jovanovic2015-09-081-1/+2
| | | | | | | | 16-bit LBU16, LHU16, LW16, LWGP and LWSP instructions Differential Revision: http://reviews.llvm.org/D10956 llvm-svn: 246987
* [mips] [IAS] Add support for the DLA pseudo-instruction and fix problems ↵Daniel Sanders2015-08-172-0/+6
| | | | | | | | | | | | | | with DLI Summary: It is the same as LA, except that it can also load 64-bit addresses and it only works on 64-bit MIPS architectures. Reviewers: tomatabacu, seanbruno, vkalintiris Subscribers: brooks, seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D9524 llvm-svn: 245208
* [mips] Remap move as or.Vasileios Kalintiris2015-08-113-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch remaps the assembly idiom 'move' to 'or' instead of 'daddu' or 'addu'. The use of addu/daddu instead of or as move was highlighted as a performance issue during the analysis of a recent 64bit design. Originally move was encoded as 'or' by binutils but was changed for the r10k cpu family due to their pipeline which had 2 arithmetic units and a single logical unit, and so could issue multiple (d)addu based moves at the same time but only 1 logical move. This patch preserves the disassembly behaviour so that disassembling a old style (d)addu move still appears as move, but assembling move always gives an or Patch by Simon Dardis. Reviewers: vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11796 llvm-svn: 244579
* MC: Remove MCSubtargetInfo() default constructorDuncan P. N. Exon Smith2015-07-101-3/+1
| | | | | | | | | | | | | | | | | | | | | Force all creators of `MCSubtargetInfo` to immediately initialize it, merging the default constructor and the initializer into an initializing constructor. Besides cleaning up the code a little, this makes it clear that the initializer is never called again later. Out-of-tree backends need a trivial change: instead of calling: auto *X = new MCSubtargetInfo(); InitXYZMCSubtargetInfo(X, ...); return X; they should call: return createXYZMCSubtargetInfoImpl(...); There's no real functionality change here. llvm-svn: 241957
* Change the last few internal StringRef triples into Triple objects.Daniel Sanders2015-07-061-2/+2
| | | | | | | | | | | | | | | | | | | | Summary: This concludes the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. At this point, the StringRef-form of GNU Triples should only be used in the public API (including IR serialization) and a couple objects that directly interact with the API (most notably the Module class). The next step is to replace these Triple objects with the TargetTuple object that will represent our authoratative/unambiguous internal equivalent to GNU Triples. Reviewers: rengolin Subscribers: llvm-commits, jholewinski, ted, rengolin Differential Revision: http://reviews.llvm.org/D10962 llvm-svn: 241472
* [mips] [IAS] Add support for the .module softfloat/hardfloat directives.Toma Tabacu2015-06-301-0/+10
| | | | | | | | | These directives are used to set the default value of the SoftFloat feature. They have the same effect as setting -m{soft, hard}-float from the command line. Differential Revision: http://reviews.llvm.org/D9073 llvm-svn: 241066
* [mips] [IAS] Add support for the .set oddspreg/nooddspreg directives.Toma Tabacu2015-06-301-0/+14
| | | | | | Differential Revision: http://reviews.llvm.org/D10657 llvm-svn: 241052
* [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.Daniel Sanders2015-06-271-0/+3
| | | | | | | | | | | | | | | | | Summary: Previously it (incorrectly) used GPR's. Patch by Simon Dardis. A couple small corrections by myself. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10567 llvm-svn: 240883
* [mips] [IAS] Refactor the emitDirectiveModuleFP() functions. NFC.Toma Tabacu2015-06-251-14/+3
| | | | | | | | | | | | | | | | | | | | Summary: Simplify emitDirectiveModuleFP() by having it just print the current information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10642 llvm-svn: 240637
* [mips] [IAS] Refactor the emitDirectiveModuleOddSPReg() functions. NFC.Toma Tabacu2015-06-251-14/+5
| | | | | | | | | | | | | | | | | | | Summary: We can simplify emitDirectiveModuleOddSPReg() by having it print the current OddSPReg information from MipsABIFlagsSection and doing an updateABIInfo() before such calls. This prevents us from forgetting to update the STI.FeatureBits, because updateABIInfo() uses those to update the MipsABIFlagsSection object, and also makes sure we use the update mechanism from MipsABIFlagsSection. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits, mpf Differential Revision: http://reviews.llvm.org/D10641 llvm-svn: 240630
* [mips64] Emit correct addend for some PC-relative relocationsPetar Jovanovic2015-06-232-12/+9
| | | | | | | | | | | So far, LLVM has not emitted correct addend for N64 and N32 ABI. This patch fixes that. It also removes fixup from MCJIT for R_MIPS_PC16 relocation. Patch by Vladimir Radosavljevic. Differential Revision: http://reviews.llvm.org/D10565 llvm-svn: 240404
* [mips] [IAS] Move some function definitions to MipsTargetStreamer.cpp. NFC.Toma Tabacu2015-06-231-0/+11
| | | | | | | | | | | | | | Summary: For the sake of consistency and to make some upcoming changes a little less noisy. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10639 llvm-svn: 240398
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-239-10/+10
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-199-10/+10
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
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