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* [mips][microMIPS] Relocate with symbol for micromips symbolsZoran Jovanovic2014-12-301-1/+5
| | | | | | Differential Revision: http://reviews.llvm.org/D6796 llvm-svn: 225008
* [mips][microMIPS] Implement LWSP and SWSP instructionsJozef Kolek2014-12-232-0/+17
| | | | | | Differential Revision: http://reviews.llvm.org/D6416 llvm-svn: 224771
* MipsABIInfo class is used in different libraries. Moving the files to ↵Vladimir Medic2014-12-173-0/+107
| | | | | | MCTargetDesc folder(LLVMMipsDesc library) prevents linkage errors. There are no functional changes. llvm-svn: 224427
* [mips][microMIPS] Implement SWP and LWP instructionsZoran Jovanovic2014-12-162-0/+11
| | | | | | Differential Revision: http://reviews.llvm.org/D5667 llvm-svn: 224338
* test commit (spelling correction)Mohit K. Bhakkad2014-12-091-1/+1
| | | | llvm-svn: 223758
* Allow target to specify prefix for labelsMatt Arsenault2014-12-041-0/+1
| | | | | | | | Use the MCAsmInfo instead of the DataLayout, and allow specifying a custom prefix for labels specifically. HSAIL requires that labels begin with @, but global symbols with &. llvm-svn: 223323
* [mips][microMIPS] Implement NOP aliasesJozef Kolek2014-11-291-1/+2
| | | | | | | | | This patch implements microMIPS 16-bit (MOVE16 $0, $0) and 32-bit (SLL $0, $0, 0) NOP aliases. http://reviews.llvm.org/D6440 llvm-svn: 222953
* [mips][microMIPS] Implement SWM16 and LWM16 instructionsZoran Jovanovic2014-11-272-0/+38
| | | | | | Differential Revision: http://reviews.llvm.org/D5579 llvm-svn: 222901
* [mips][microMIPS] Implement LBU16, LHU16, LW16, SB16, SH16 and SW16 instructionsJozef Kolek2014-11-242-0/+51
| | | | | | Differential Revision: http://reviews.llvm.org/D5122 llvm-svn: 222653
* [mips][micromips] Implement SWM32 and LWM32 instructionsZoran Jovanovic2014-11-192-0/+34
| | | | | | Differential Revision: http://reviews.llvm.org/D5519 llvm-svn: 222367
* Test commit to verify that commit access works.Jozef Kolek2014-11-181-1/+1
| | | | llvm-svn: 222244
* [mips][microMIPS] Implement ANDI16 instructionZoran Jovanovic2014-11-052-0/+31
| | | | llvm-svn: 221367
* [mips][microMIPS] Mark symbols as microMIPS if necessaryZoran Jovanovic2014-11-052-0/+52
| | | | | | Differential Revision: http://reviews.llvm.org/D6039 llvm-svn: 221355
* Reverted revisions 221351, 221352 and 221353.Zoran Jovanovic2014-11-052-31/+0
| | | | llvm-svn: 221354
* [mips][microMIPS] Implement ANDI16 instructionZoran Jovanovic2014-11-052-0/+31
| | | | | | Differential Revision: http://reviews.llvm.org/D5163 llvm-svn: 221351
* [mips][microMIPS] Implement ADDIUR1SP instructionZoran Jovanovic2014-10-232-0/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D5153 llvm-svn: 220477
* ps][microMIPS] Implement ADDIUR2 instructionZoran Jovanovic2014-10-232-0/+18
| | | | | | Differential Revision: http://reviews.llvm.org/D5151 llvm-svn: 220476
* [mips][microMIPS] Implement CodeGen support for SLL16 and SRL16 instructionsZoran Jovanovic2014-10-232-0/+13
| | | | | | Differential Revision: http://reviews.llvm.org/D5774 llvm-svn: 220474
* Simplify handling of --noexecstack by using getNonexecutableStackSection.Rafael Espindola2014-10-155-15/+8
| | | | llvm-svn: 219799
* [mips][microMIPS] Implement ADDIUSP instructionZoran Jovanovic2014-10-102-0/+20
| | | | | | Differential Revision: http://reviews.llvm.org/D5084 llvm-svn: 219500
* Support padding unaligned data in .text.Joerg Sonnenberger2014-10-021-1/+6
| | | | llvm-svn: 218870
* [mips] Rename emit and parse functions for the .cpload assembler directive. NFC.Toma Tabacu2014-10-011-3/+3
| | | | | | | | | | | | | | Summary: It's better if we have a consistent name for .cpload-related functions. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D5437 llvm-svn: 218768
* [mips] Add assembler support for the .set nodsp directive.Toma Tabacu2014-09-171-0/+6
| | | | | | | | | | | | Summary: This directive is used to tell the assembler to reject DSP-specific instructions. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D5142 llvm-svn: 217946
* [mips][microMIPS] Implement JRADDIUSP instructionZoran Jovanovic2014-09-122-0/+25
| | | | | | Differential Revision: http://reviews.llvm.org/D5046 llvm-svn: 217681
* [mips] Add assembler support for .set mips0 directive.Toma Tabacu2014-09-091-0/+3
| | | | | | | | | | | | | | | | | | Summary: This directive is used to reset the assembler options to their initial values. Assembly programmers use it in conjunction with the ".set mipsX" directives. This patch depends on the .set push/pop directive (http://reviews.llvm.org/D4821). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4957 llvm-svn: 217438
* [mips] Add assembler support for .set push/pop directive.Toma Tabacu2014-09-091-0/+7
| | | | | | | | | | | | | | | Summary: These directives are used to save the current assembler options (in the case of ".set push") and restore the previously saved options (in the case of ".set pop"). Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4821 llvm-svn: 217432
* Make some helpers static or move into the llvm namespace.Benjamin Kramer2014-09-031-0/+1
| | | | llvm-svn: 217077
* [mips] Add assembler support for .set arch=x directive.Toma Tabacu2014-08-191-0/+8
| | | | | | | | | | | | | | | | | | Summary: This directive is similar to ".set mipsX". It is used to change the CPU target of the assembler, enabling it to accept instructions for a specific CPU. This patch only implements the r4000 CPU (which is treated internally as generic mips3) and the generic ISAs. Contains work done by Matheus Almeida. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4884 llvm-svn: 215978
* Remove HasLEB128.Rafael Espindola2014-08-151-1/+0
| | | | | | We already require CFI, so it should be safe to require .leb128 and .uleb128. llvm-svn: 215712
* [mips] Rename [gs]etCanHaveModuleDir to more natural namesDaniel Sanders2014-08-141-51/+33
| | | | | | | | | | | | | | | | | Summary: getCanHaveModuleDir() is renamed to isModuleDirectiveAllowed(), and setCanHaveModuleDir() is renamed to forbidModuleDirective() since it is only ever given a false argument. Reviewers: vmedic Reviewed By: vmedic Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D4885 llvm-svn: 215628
* Canonicalize header guards into a common format.Benjamin Kramer2014-08-1310-21/+21
| | | | | | | | | | Add header guards to files that were missing guards. Remove #endif comments as they don't seem common in LLVM (we can easily add them back if we decide they're useful) Changes made by clang-tidy with minor tweaks. llvm-svn: 215558
* [mips] Refactor calls to setCanHaveModuleDir.Toma Tabacu2014-08-131-114/+55
| | | | | | | | | | | | | | | | | Summary: Moved some calls to setCanHaveModuleDir to the MipsTargetStreamer base class and removed the resulting empty functions from the MipsTargetELFStreamer class. Also fixed a missing call to setCanHaveModuleDir in MipsTargetELFStreamer::emitDirectiveSetMicroMips. Reviewers: dsanders Reviewed By: dsanders Subscribers: tomatabacu Differential Revision: http://reviews.llvm.org/D4781 llvm-svn: 215542
* Re-commit: [mips] Implement .ent, .end, .frame, .mask and .fmask.Daniel Sanders2014-08-131-7/+53
| | | | | | | | | | | Patch by Matheus Almeida and Toma Tabacu The lld test failure on the previous attempt to commit was caused by the addition of the .pdr section causing the offsets it was checking to change. This has been fixed by removing the .ent/.end directives from that test since they weren't really needed. llvm-svn: 215535
* Reverted my "Testing commit access" commit.Toma Tabacu2014-08-121-0/+1
| | | | llvm-svn: 215441
* Testing commit access.Toma Tabacu2014-08-121-1/+0
| | | | llvm-svn: 215440
* Revert r215359 - [mips] Implement .ent, .end, .frame, .mask and .fmask ↵Daniel Sanders2014-08-111-53/+7
| | | | | | | | assembler directives It seems to cause an lld test (elf/Mips/hilo16-3.test) to fail. Reverted while we investigate. llvm-svn: 215361
* [mips] Implement .ent, .end, .frame, .mask and .fmask assembler directivesDaniel Sanders2014-08-111-7/+53
| | | | | | | | Patch by Matheus Almeida and Toma Tabacu Differential Revision: http://reviews.llvm.org/D4179 llvm-svn: 215359
* If available, pass down the Fixup object to EvaluateAsRelocatable.Joerg Sonnenberger2014-08-102-3/+5
| | | | | | | At least on PowerPC, the interpretation of certain modifiers depends on the context they appear in. llvm-svn: 215310
* [mips] Add assembler support for .set msa/nomsa directive.Daniel Sanders2014-08-071-0/+12
| | | | | | | | | | | | | | | Summary: These directives are used to toggle whether the assembler accepts MSA-specific instructions or not. Patch by Matheus Almeida and Toma Tabacu. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D4783 llvm-svn: 215099
* [mips] Add assembler support for '.set mipsX'.Daniel Sanders2014-08-041-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch also fixes an issue with the way the Mips assembler enables/disables architecture features. Before this patch, the assembler never disabled feature bits. For example, .set mips64 .set mips32r2 would result in the 'OR' of mips64 with mips32r2 feature bits which isn't right. Unfortunately this isn't trivial to fix because there's not an easy way to clear feature bits as the algorithm in MCSubtargetInfo (ToggleFeature) only clears the bits that imply the feature being cleared and not the implied bits by the feature (there's a better explanation to the code I added). Patch by Matheus Almeida and updated by Toma Tabacu Reviewers: vmedic, matheusalmeida, dsanders Reviewed By: dsanders Subscribers: tomatabacu, llvm-commits Differential Revision: http://reviews.llvm.org/D4123 llvm-svn: 214709
* [mips] Add MipsOptionRecord abstraction and use it to implement ↵Daniel Sanders2014-07-215-44/+144
| | | | | | | | | | | | | | | .reginfo/.MIPS.options This abstraction allows us to support the various records that can be placed in the .MIPS.options section in the future. We currently use it to record register usage information (the ODK_REGINFO record in our ELF64 spec). Each .MIPS.options record should subclass MipsOptionRecord and provide an implementation of EmitMipsOptionRecord. Patch by Matheus Almeida and Toma Tabacu llvm-svn: 213522
* [MC] Pass MCSymbolData to needsRelocateWithSymbolUlrich Weigand2014-07-201-2/+4
| | | | | | | | | | | | | | | | | | As discussed in a previous checking to support the .localentry directive on PowerPC, we need to inspect the actual target symbol in needsRelocateWithSymbol to make the appropriate decision based on that symbol's st_other bits. Currently, needsRelocateWithSymbol does not get the target symbol. However, it is directly available to its sole caller. This patch therefore simply extends the needsRelocateWithSymbol by a new parameter "const MCSymbolData &SD", passes in the target symbol, and updates all derived implementations. In particular, in the PowerPC implementation, this patch removes the FIXME added by the previous checkin. llvm-svn: 213487
* Avoid resetting the UseSoftFloat and FloatABIType on the TargetMachineEric Christopher2014-07-181-1/+1
| | | | | | | | | | Options struct and move the comment to inMips16HardFloat. Use the fact that we now know whether or not we cared about soft float to set the libcalls. Accordingly rename mipsSEUsesSoftFloat to abiUsesSoftFloat and propagate since it's no longer CPU specific. llvm-svn: 213335
* [mips] .reginfo is 8 byte aligned on N32.Daniel Sanders2014-07-171-1/+2
| | | | | | Differential Revision: http://reviews.llvm.org/D4540 llvm-svn: 213246
* [mips] Correct ELF e_flags for the N32 ABI when using a mips-* triple rather ↵Daniel Sanders2014-07-171-15/+11
| | | | | | | | | | | | | | | | | | | than a mips64-* triple Summary: Generally speaking, mips-* vs mips64-* should not be used to make decisions about the content or format of the ELF. This should be based on the ABI and CPU in use. For example, `mips-linux-gnu-clang -mips64r2 -mabi=64` should produce an ELF64 as should `mips64-linux-gnu-clang -mabi=64`. Conversely, `mips64-linux-gnu-clang -mabi=n32` should produce an ELF32 as should `mips-linux-gnu-clang -mips64r2 -mabi=n32`. This patch fixes the e_flags but leaves the ELF32 vs ELF64 issue for now since there is no apparent way to base this decision on the ABI and CPU. Differential Revision: http://reviews.llvm.org/D4539 llvm-svn: 213244
* [mips] Correct .MIPS.abiflags for -mfpxx on MIPS32r6Daniel Sanders2014-07-172-4/+10
| | | | | | | | | | | Summary: The cpr1_size field describes the minimum register width to run the program rather than the size of the registers on the target. MIPS32r6 was acting as if -mfp64 has been given because it starts off with 64-bit FPU registers. Differential Revision: http://reviews.llvm.org/D4538 llvm-svn: 213243
* [mips] Fix ELF e_flags related to -mabicalls and -mplt.Daniel Sanders2014-07-171-0/+6
| | | | | | | | | | | | | | Summary: These options are not implemented yet but we act as if they are always given. The integrated assembler is driven by the clang driver so the e_flag test cases should match the e_flags emitted by GCC+GAS rather than GAS by itself. Differential Revision: http://reviews.llvm.org/D4536 llvm-svn: 213242
* Re-commit: [mips] Correct section alignments and EntrySizes for .bss, .text, ↵Daniel Sanders2014-07-141-5/+23
| | | | | | | | .data, .reginfo, .MIPS.options, and .MIPS.abiflags The lld tests will temporarily fail again but Simon Atanasyan will commit a fix for those shortly. llvm-svn: 212946
* Revert: [mips] Correct section alignments and EntrySizes for .bss, .text, ↵Daniel Sanders2014-07-141-23/+5
| | | | | | | | .data, .reginfo, .MIPS.options, and .MIPS.abiflags This commit causes multiple lld tests to fail. Reverting while I investigate the issue. llvm-svn: 212945
* [mips] Correct section alignments and EntrySizes for .bss, .text, .data, ↵Daniel Sanders2014-07-141-5/+23
| | | | | | | | | | | | | | | | | | .reginfo, .MIPS.options, and .MIPS.abiflags Summary: .bss, .text, and .data are at least 16-byte aligned. .reginfo is 4-byte aligned and has a 24-byte EntrySize. .MIPS.abiflags has an 24-byte EntrySize. .MIPS.options is 8-byte aligned and has 1-byte EntrySize. Using a 1-byte EntrySize for .MIPS.options seems strange because the records are neither 1-byte long nor fixed-length but this matches the value that GAS emits. Differential Revision: http://reviews.llvm.org/D4487 llvm-svn: 212939
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