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* [mips] Hoist Parser.Lex() calls out of MatchAnyRegisterNameWithoutDollar()Daniel Sanders2014-04-011-9/+8
| | | | | | | | | | | | | | | Summary: No functional change Depends on D3222 Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3232 llvm-svn: 205295
* [mips] Rewrite MipsAsmParser and MipsOperand.Daniel Sanders2014-04-011-932/+704
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Highlights: - Registers are resolved much later (by the render method). Prior to that point, GPR32's/GPR64's are GPR's regardless of register size. Similarly FGR32's/FGR64's/AFGR64's are FGR's regardless of register size or FR mode. Numeric registers can be anything. - All registers are parsed the same way everywhere (even when handling symbol aliasing) - One consequence is that all registers can be specified numerically almost anywhere (e.g. $fccX, $wX). The exception is symbol aliasing but that can be easily resolved. - Removes the need for the hasConsumedDollar hack - Parenthesis and Bracket suffixes are handled generically - Micromips instructions are parsed directly instead of going through the standard encodings first. - rdhwr accepts all 32 registers, and the following instructions that previously xfailed now work: ddiv, ddivu, div, divu, cvt.l.[ds], se[bh], wsbh, floor.w.[ds], c.ngl.d, c.sf.s, dsbh, dshd, madd.s, msub.s, nmadd.s, nmsub.s, swxc1 - Diagnostics involving registers point at the correct character (the $) - There's only one kind of immediate in MipsOperand. LSA immediates are handled by the predicate and renderer. Lowlights: - Hardcoded '$zero' in the div patterns is handled with a hack. MipsOperand::isReg() will return true for a k_RegisterIndex token with Index == 0 and getReg() will return ZERO for this case. Note that it doesn't return ZERO_64 on isGP64() targets. - I haven't cleaned up all of the now-unused functions. Some more of the generic parser could be removed too (integers and relocs for example). - insve.df needed a custom decoder to handle the implicit fourth operand that was needed to make it parse correctly. The difficulty was that the matcher expected a Token<'0'> but gets an Imm<0>. Adding an implicit zero solved this. Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3222 llvm-svn: 205292
* Revert: [mips] Rewrite MipsAsmParser and MipsOperand.' due to buildbot ↵Daniel Sanders2014-03-311-704/+932
| | | | | | | | errors in lld tests. It's currently unable to parse 'sym + imm' without surrounding parenthesis. llvm-svn: 205237
* [mips] Rewrite MipsAsmParser and MipsOperand.Daniel Sanders2014-03-311-932/+704
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Highlights: - Registers are resolved much later (by the render method). Prior to that point, GPR32's/GPR64's are GPR's regardless of register size. Similarly FGR32's/FGR64's/AFGR64's are FGR's regardless of register size or FR mode. Numeric registers can be anything. - All registers are parsed the same way everywhere (even when handling symbol aliasing) - One consequence is that all registers can be specified numerically almost anywhere (e.g. $fccX, $wX). The exception is symbol aliasing but that can be easily resolved. - Removes the need for the hasConsumedDollar hack - Parenthesis and Bracket suffixes are handled generically - Micromips instructions are parsed directly instead of going through the standard encodings first. - rdhwr accepts all 32 registers, and the following instructions that previously xfailed now work: ddiv, ddivu, div, divu, cvt.l.[ds], se[bh], wsbh, floor.w.[ds], c.ngl.d, c.sf.s, dsbh, dshd, madd.s, msub.s, nmadd.s, nmsub.s, swxc1 - Diagnostics involving registers point at the correct character (the $) - There's only one kind of immediate in MipsOperand. LSA immediates are handled by the predicate and renderer. Lowlights: - Hardcoded '$zero' in the div patterns is handled with a hack. MipsOperand::isReg() will return true for a k_RegisterIndex token with Index == 0 and getReg() will return ZERO for this case. Note that it doesn't return ZERO_64 on isGP64() targets. - I haven't cleaned up all of the now-unused functions. Some more of the generic parser could be removed too (integers and relocs for example). - insve.df needed a custom decoder to handle the implicit fourth operand that was needed to make it parse correctly. The difficulty was that the matcher expected a Token<'0'> but gets an Imm<0>. Adding an implicit zero solved this. Reviewers: matheusalmeida, vmedic Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3222 llvm-svn: 205229
* [mips] Fix use of uninitialized value reported by the ↵Daniel Sanders2014-03-311-0/+2
| | | | | | sanitizer-x86_64-linux-bootstrap buildbot llvm-svn: 205213
* [mips] Implement missing relocations in the integrated assembler.Daniel Sanders2014-03-311-0/+8
| | | | | | | | | | %got_hi, %got_lo, %call_hi, %call_lo, %higher, and %highest are now recognised by MipsAsmParser::getVariantKind(). To prevent future issues with missing entries in this StringSwitch, I've added an assertion to the default case. llvm-svn: 205200
* Capitalize the D in parseDirectiveGpDWord.Rafael Espindola2014-03-311-4/+4
| | | | | | | | DWord seems to be the canonical way to camel case dword in llvm. Thanks to Daniel Sander for noticing. llvm-svn: 205191
* Parse .gpdword and convert another llc -filetype=obj test.Rafael Espindola2014-03-281-1/+22
| | | | llvm-svn: 205028
* [mips] Some uses of isMips64()/hasMips64() are really tests for 64-bit GPR'sDaniel Sanders2014-03-271-15/+14
| | | | | | | | | | | | Summary: No functional change since these predicates are (currently) synonymous. Extracted from a patch by David Chisnall His work was sponsored by: DARPA, AFRL Differential Revision: http://llvm-reviews.chandlerc.com/D3202 llvm-svn: 204943
* [mips] Attempting to use register $32 should be an error instead of an ↵Daniel Sanders2014-03-271-1/+1
| | | | | | | | | | | | assertion. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3201 llvm-svn: 204932
* [mips] Add support for .cpsetupDaniel Sanders2014-03-271-0/+133
| | | | | | | | | | | | | | Summary: Patch by Robert N. M. Watson His work was sponsored by: DARPA, AFRL Small corrections by myself. CC: theraven, matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3199 llvm-svn: 204924
* [mips] Add support to the '.dword' directive.Matheus Almeida2014-03-261-0/+5
| | | | | | | The '.dword' directive accepts a list of expressions and emits them in 8-byte chunks in successive locations. llvm-svn: 204822
* [mips] Rename function in MipsAsmParser.Matheus Almeida2014-03-261-4/+4
| | | | | | | | | | | | parseDirectiveWord is a generic function that parses an expression which means there's no need for it to have such an specific name. Renaming it to parseDataDirective so that it can also be used to handle .dword directives[1]. [1]To be added in a follow up commit. No functional changes. llvm-svn: 204818
* [mips] Add support to '.set mips64'.Matheus Almeida2014-03-261-0/+6
| | | | | | | | | | The '.set mips64' directive enables the feature Mips:FeatureMips64 from assembly. Note that it doesn't modify the ELF header as opposed to the use of -mips64 from the command-line. The reason for this is that we want to be as compatible as possible with existing assemblers like GAS. llvm-svn: 204817
* [mips] Add support to '.set mips64r2'.Matheus Almeida2014-03-261-0/+6
| | | | | | | | | | The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2 from assembly. Note that it doesn't modify the ELF header as opposed to the use of -mips64r2 from the command-line. The reason for this is that we want to be as compatible as possible with existing assemblers like GAS. llvm-svn: 204815
* [mips] Hoist common functionality into a new function.Matheus Almeida2014-03-261-29/+30
| | | | | | | | | | Given that we support multiple directives that enable a particular feature (e.g. '.set mips16'), it's best to hoist that code into a new function so that we don't repeat the same pattern w.r.t parsing and handling error cases. No functional changes. llvm-svn: 204811
* [mips] Add support for '.option pic2'.Matheus Almeida2014-03-261-0/+11
| | | | | | | | | The directive '.option pic2' enables PIC from assembly source. At the moment none of the macros/directives check the PIC bit but that's going to be fixed relatively soon. For example, the expansion of macros like 'la' depend on the relocation model. llvm-svn: 204803
* [mips] The register names depend on the ABI being N32/N64 rather than the ↵Daniel Sanders2014-03-261-15/+18
| | | | | | | | | | | | | | arch being mips64 Summary: Added test cases for O32 and N32 on MIPS64. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3175 llvm-svn: 204796
* [mips] $s8 is an alias for $fp in all ABI's, not just N32/N64.Daniel Sanders2014-03-261-2/+2
| | | | llvm-svn: 204793
* [mips] '.set at=$0' should be equivalent to '.set noat'Daniel Sanders2014-03-251-1/+1
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D3171 llvm-svn: 204714
* [mips] Correct testcase for .set at=$reg and emit the new warnings for ↵Daniel Sanders2014-03-251-11/+19
| | | | | | | | | | | | | | | | | | numeric registers too. Summary: Remove the XFAIL added in my previous commit and correct the test such that it correctly tests the expansion of the assembler temporary. Also added a test to check that $at is always $1 when written by the user. Corrected the new assembler temporary warnings so that they are emitted for numeric registers too. Differential Revision: http://llvm-reviews.chandlerc.com/D3169 llvm-svn: 204711
* [mips] Fix assembler temporary expansion and add associated warnings about ↵Daniel Sanders2014-03-251-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | the use of $at. Summary: The assembler temporary is normally $at ($1) but can be reassigned using '.set at=$reg'. Regardless of which register is nominated as the assembler temporary, $at remains $1 when written by the user. Adds warnings under the following conditions: * The register nominated as the assembler temporary is used by the user. * '.set noat' is in effect and $at is used by the user. Both of these only work for named registers. I have a follow up commit that makes it work for numeric registers as well. XFAIL set-at-directive.s since it incorrectly tests that $at is redefined by '.set at=$reg'. Testcases will follow in a separate commit. Patch by David Chisnall His work was sponsored by: DARPA, AFRL Differential Revision: http://llvm-reviews.chandlerc.com/D3167 llvm-svn: 204710
* [mips] Add error message when trying to use $at in '.set noat' mode.Daniel Sanders2014-03-241-1/+6
| | | | | | | | | | Summary: Patch by David Chisnall His work was sponsored by: DARPA, AFRL Differential Revision: http://llvm-reviews.chandlerc.com/D3158 llvm-svn: 204621
* [mips] Implement shorthand add / sub forms for MIPS.Daniel Sanders2014-03-241-0/+30
| | | | | | | | | | | | | | | | | | | | | Summary: - If only two registers are passed to a three-register operation, then the first argument is both source and destination register. - If a non-register is passed as the last argument, generate the immediate version of the instruction. Also mark DADD commutative and add scheduling information (to the generic scheduler), and implement DSUB. Patch by David Chisnall His work was sponsored by: DARPA, AFRL CC: theraven Differential Revision: http://llvm-reviews.chandlerc.com/D3148 llvm-svn: 204605
* [mips] Assembly parser must invoke the target streamer to handle .set ↵Matheus Almeida2014-03-101-0/+1
| | | | | | reorder macro. llvm-svn: 203459
* This patch implements .set dsp directive and sets appropriate feature ↵Vladimir Medic2014-03-051-0/+7
| | | | | | bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file. llvm-svn: 202966
* This patch implements .set mips32r2 directive and sets appropriate feature ↵Vladimir Medic2014-03-041-0/+21
| | | | | | bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file. llvm-svn: 202807
* [mips] Make it impossible to have UnknownABI in CodeGen and Integrated ↵Daniel Sanders2014-02-201-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Assembler. Summary: This removes the need to coerce UnknownABI to the default ABI (O32 for MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser. Clang has been updated to disable both possible default ABI's before enabling the ABI it intends to use. [*] N64 being the default for MIPS64 is not actually correct. However N32 is not fully implemented/tested yet. Depends on: D2830 Reviewers: jacksprat, matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D2832 Differential Revision: http://llvm-reviews.chandlerc.com/D2846 llvm-svn: 201792
* [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressionsPetar Jovanovic2014-02-041-2/+15
| | | | | | | | | | | Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS by creating target expression class MipsMCExpr. Patch by Sasa Stankovic. Differential Revision: http://llvm-reviews.chandlerc.com/D2592 llvm-svn: 200783
* [mips] Fix typo.Matheus Almeida2014-01-301-1/+1
| | | | llvm-svn: 200465
* Change MCStreamer EmitInstruction interface to take subtarget infoDavid Woodhouse2014-01-281-1/+1
| | | | llvm-svn: 200345
* Implement the missing bits corresponding to .mips_hack_elf_flags.Rafael Espindola2014-01-261-15/+1
| | | | | | | | | | | | These were: * noreorder handling on the target object streamer and asm parser. * setting the initial flag bits based on the enabled features. * setting the elf header flag for micromips It is *really* depressing I am the one doing this instead of someone at mips actually taking the time to understand the infrastructure. llvm-svn: 200138
* This reverts commit r200064 and r200051.Rafael Espindola2014-01-251-44/+15
| | | | | | | | | | | | | | | | | | | r200064 depends on r200051. r200051 is broken: I tries to replace .mips_hack_elf_flags, which is a good thing, but what it replaces it with is even worse. The new emitMipsELFFlags it adds corresponds to no assembly directive, is not marked as a hack and is not even printed to the .s file. The patch also introduces more uses of hasRawTextSupport. The correct way to remove .mips_hack_elf_flags is to have the mips target streamer handle the default flags (and command line options). That way the same code path is used for asm and obj. The streamer interface should *really* correspond to what is printed in the .s file. llvm-svn: 200078
* [Mips] TargetStreamer ELF flag Support for default and commandline options.Jack Carter2014-01-251-15/+44
| | | | | | | | | | | | | | | This patch uses a common MipsTargetSteamer interface for both MipsAsmPrinter and MipsAsmParser for recording default and commandline driven directives that affect ELF header flags. It has been noted that the .ll tests affected by this patch belong in test/Codegen/Mips. I will move them in a separate patch. Also, a number of directives do not get expressed by AsmPrinter in the resultant .s assembly such as setting the correct ASI. I have noted this in the tests and they will be addressed in later patches. llvm-svn: 200051
* Fix known typosAlp Toker2014-01-241-2/+2
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. llvm-svn: 200018
* Unify duplicated functions.Rafael Espindola2014-01-241-1/+1
| | | | llvm-svn: 200014
* [Mips] formatting through clang-formatJack Carter2014-01-221-10/+10
| | | | llvm-svn: 199853
* [Mips] TargetStreamer Support for .set mips16.Jack Carter2014-01-221-3/+29
| | | | | | | | | | This patch updates .set mips16 support which affects the ELF ABI and its flags. In addition the patch uses a common interface for both the MipsTargetSteamer and MipsObjectStreamer that the assembler uses for both ELF and ASCII output for these directives. llvm-svn: 199851
* Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".Rafael Espindola2014-01-141-28/+5
| | | | | | | This matches what gnu as does and implementing this is easier than arguing about it. llvm-svn: 199181
* Make getTargetStreamer return a possibly null pointer.Rafael Espindola2014-01-141-1/+1
| | | | | | | | | This will allow it to be called from target independent parts of the main streamer that don't know if there is a registered target streamer or not. This in turn will allow targets to perform extra actions at specified points in the interface: add extra flags for some labels, extra work during finalization, etc. llvm-svn: 199174
* correct target directive handling error handlingSaleem Abdulrasool2014-01-131-7/+12
| | | | | | | | | | | | | | The target specific parser should return `false' if the target AsmParser handles the directive, and `true' if the generic parser should handle the directive. Many of the target specific directive handlers would `return Error' which does not follow these semantics. This change simply changes the target specific routines to conform to the semantis of the ParseDirective correctly. Conformance to the semantics improves diagnostics emitted for the invalid directives. X86 is taken as a sample to ensure that multiple diagnostics are not presented for a single error. llvm-svn: 199068
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-2/+2
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* [Mips] TargetStreamer Support for .abicalls and .set pic0.Jack Carter2014-01-061-0/+43
| | | | | | | | | | This patch adds .abicalls and .set pic0 support which affects the ELF ABI and its flags. In addition the patch uses a common interface for both the MipsTargetSteamer and MipsObjectStreamer that both the integrated and standalone assemblers will use for the output for these directives. llvm-svn: 198646
* [mips] Add checks for alignment and maximum displacements for most of theMatheus Almeida2013-12-131-0/+44
| | | | | | | | | | | branch instructions for mips and micromips instruction sets thus avoiding the situation of generating branches to undesired locations if offsets cannot be encoded. This patch also checks if a fixup cannot be applied and returns a fatal error if that's the case. llvm-svn: 197223
* Method parseSetAssignment treats every operand with '$' sign as register and ↵Vladimir Medic2013-12-091-16/+1
| | | | | | | | | the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps) As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example: .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names. llvm-svn: 196773
* [CMake] Let add_public_tablegen_target responsible to provide dependency to ↵NAKAMURA Takumi2013-11-281-2/+0
| | | | | | | | | CommonTableGen. add_public_tablegen_target adds *CommonTableGen to LLVM_COMMON_DEPENDS. LLVM_COMMON_DEPENDS affects add_llvm_library (and other add_target stuff) within its scope. llvm-svn: 195927
* [CMake] Prune include_directories() in llvm/lib/Target. add_llvm_target() ↵NAKAMURA Takumi2013-11-281-1/+0
| | | | | | sets them. llvm-svn: 195921
* reverts 195057 per requestJack Carter2013-11-191-0/+36
| | | | llvm-svn: 195152
* [Mips] Support for MicroMips STO refactoring.Jack Carter2013-11-191-36/+0
| | | | | | | | | | | | | | | | No true functional changes. Change the "hack" name of emitMipsHackSTOCG to emitSymSTO. Remove demonstration code in AsmParser for emitMipsHackSTOCG and emitMipsHackELFFlags. The STO field is in an ELF symbol and is not an explicit directive. That said, we are missing the compliment call in AsmParser and that will need to be addressed soon. XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags. These will built out with following patches. llvm-svn: 195067
* [mips][msa] Fix immediate value of LSA instruction as it was being wrongly ↵Matheus Almeida2013-11-181-5/+57
| | | | | | | | | encoded. The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field. llvm-svn: 195004
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