| Commit message (Collapse) | Author | Age | Files | Lines |
... | |
|
|
|
| |
llvm-svn: 103193
|
|
|
|
| |
llvm-svn: 102836
|
|
|
|
| |
llvm-svn: 102835
|
|
|
|
|
|
| |
This should fix PR6603.
llvm-svn: 102834
|
|
|
|
|
|
| |
changes before doing phi lowering for switches.
llvm-svn: 102809
|
|
|
|
|
|
|
| |
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
llvm-svn: 101984
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
|
|
|
|
| |
llvm-svn: 101564
|
|
|
|
| |
llvm-svn: 101334
|
|
|
|
| |
llvm-svn: 100709
|
|
|
|
|
|
| |
DBG_VALUE does not generate code.
llvm-svn: 100681
|
|
|
|
| |
llvm-svn: 100399
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.
This works well because TableGen resolves member references late:
class I : Instruction {
AddrMode AM = AddrModeNone;
let TSFlags{3-0} = AM.Value;
}
let AM = AddrMode4 in
def ADD : I;
TSFlags gets the expected bits from AddrMode4 in this example.
llvm-svn: 100384
|
|
|
|
| |
llvm-svn: 100376
|
|
|
|
|
|
|
|
|
|
| |
"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
llvm-svn: 100327
|
|
|
|
|
|
| |
don't have mcstreamer support for yet.
llvm-svn: 100319
|
|
|
|
|
|
| |
raw_ostream to print to.
llvm-svn: 100313
|
|
|
|
|
|
|
|
| |
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.
llvm-svn: 100307
|
|
|
|
|
|
| |
member of AsmPrinter. Instead, pass it in explicitly.
llvm-svn: 100306
|
|
|
|
| |
llvm-svn: 100214
|
|
|
|
|
|
|
| |
folder to be tolerant of debug info following the
branch(es) at the end of a block.
llvm-svn: 100168
|
|
|
|
|
|
|
|
|
| |
create symbols. It is extremely error prone and a source of a lot
of the remaining integrated assembler bugs on x86-64.
This fixes rdar://7807601.
llvm-svn: 99902
|
|
|
|
| |
llvm-svn: 98451
|
|
|
|
|
|
|
|
|
|
|
| |
and passing off ownership to AsmPrinter. Now MachineModuleInfo
creates it and owns it by value. This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code. This also allows MachineFunction to
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.
llvm-svn: 98450
|
|
|
|
| |
llvm-svn: 98394
|
|
|
|
|
|
| |
remove it.
llvm-svn: 98390
|
|
|
|
| |
llvm-svn: 98124
|
|
|
|
|
|
|
|
|
|
| |
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).
No functionality change.
llvm-svn: 98086
|
|
|
|
|
|
|
|
| |
otherwise msp430-as will silently miscompile the code (TI's assembler report an error though).
This fixes PR6349
llvm-svn: 97877
|
|
|
|
|
|
|
| |
now that isel handles chains more aggressively. This also
allows us to make isLegalToFold non-virtual.
llvm-svn: 97597
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
CopyToReg/CopyFromReg/INLINEASM. These are annoying because
they have the same opcode before an after isel. Fix this by
setting their NodeID to -1 to indicate that they are selected,
just like what automatically happens when selecting things that
end up being machine nodes.
With that done, give IsLegalToFold a new flag that causes it to
ignore chains. This lets the HandleMergeInputChains routine be
the one place that validates chains after a match is successful,
enabling the new hotness in chain processing. This smarter
chain processing eliminates the need for "PreprocessRMW" in the
X86 and MSP430 backends and enables MSP to start matching it's
multiple mem operand instructions more aggressively.
I currently #if out the dead code in the X86 backend and MSP
backend, I'll remove it for real in a follow-on patch.
The testcase changes are:
test/CodeGen/X86/sse3.ll: we generate better code
test/CodeGen/X86/store_op_load_fold2.ll: PreprocessRMW was
miscompiling this before, we now generate correct code
Convert it to filecheck while I'm at it.
test/CodeGen/MSP430/Inst16mm.ll: Add a testcase for mem/mem
folding to make anton happy. :)
llvm-svn: 97596
|
|
|
|
|
|
|
|
|
|
|
|
| |
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
llvm-svn: 97555
|
|
|
|
| |
llvm-svn: 97348
|
|
|
|
|
|
| |
This fixes PR6348
llvm-svn: 96734
|
|
|
|
| |
llvm-svn: 96288
|
|
|
|
|
|
|
|
| |
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
llvm-svn: 96255
|
|
|
|
|
|
| |
change to SelectionDAG build APIs.
llvm-svn: 96234
|
|
|
|
|
|
| |
isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
llvm-svn: 96223
|
|
|
|
|
|
|
|
|
| |
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
|
|
|
|
| |
llvm-svn: 95180
|
|
|
|
|
|
|
|
| |
the end of the instruction instead of expecting the caller to
do it. This currently causes the asm-verbose instruction
comments to be on the next line.
llvm-svn: 95178
|
|
|
|
|
|
|
|
| |
than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
llvm-svn: 95177
|
|
|
|
| |
llvm-svn: 95160
|
|
|
|
|
|
|
| |
mccontext instead of having AsmPrinter do it. This allows other
types of MCStreamer's to be passed in.
llvm-svn: 95155
|
|
|
|
|
|
| |
sibcall eligibility.
llvm-svn: 95130
|
|
|
|
|
|
|
| |
Diffstat:
6 files changed, 30 insertions(+), 284 deletions(-)
llvm-svn: 94727
|
|
|
|
|
|
|
|
| |
Move the X86 implementation of function body emission up to
AsmPrinter::EmitFunctionBody, which works by calling the virtual
EmitInstruction method.
llvm-svn: 94716
|
|
|
|
| |
llvm-svn: 94706
|
|
|
|
|
|
|
|
| |
EmitFunctionHeader:
7 files changed, 16 insertions(+), 210 deletions(-)
llvm-svn: 94630
|
|
|
|
|
|
|
|
|
| |
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.
llvm-svn: 94626
|