| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Remove the isMoveInstr() hook. | Jakob Stoklund Olesen | 2010-07-16 | 1 | -4/+0 |
| | | | | | llvm-svn: 108567 | ||||
| * | Replace copyRegToReg with copyPhysReg for MSP430. | Jakob Stoklund Olesen | 2010-07-11 | 1 | -5/+4 |
| | | | | | llvm-svn: 108080 | ||||
| * | Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This | Stuart Hastings | 2010-06-17 | 1 | -1/+2 |
| | | | | | | | | | | | | | addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243 | ||||
| * | Implement @llvm.returnaddress. rdar://8015977. | Evan Cheng | 2010-05-22 | 1 | -2/+4 |
| | | | | | llvm-svn: 104421 | ||||
| * | Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it | Dan Gohman | 2010-05-06 | 1 | -1/+2 |
| | | | | | | | doesn't have to guess. llvm-svn: 103194 | ||||
| * | Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot. | Evan Cheng | 2010-05-06 | 1 | -2/+4 |
| | | | | | llvm-svn: 103193 | ||||
| * | Add branch relaxation pass (shamelessly stolen from PPC). | Anton Korobeynikov | 2010-01-15 | 1 | -0/+18 |
| | | | | | llvm-svn: 93554 | ||||
| * | Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor of | Dan Gohman | 2009-12-05 | 1 | -1/+0 |
| | | | | | | | | MachineBasicBlock::canFallThrough(), which is target-independent and more thorough. llvm-svn: 90634 | ||||
| * | Implement branch folding | Anton Korobeynikov | 2009-10-21 | 1 | -3/+13 |
| | | | | | llvm-svn: 84774 | ||||
| * | Cosmetic changes, no functionality changes | Anton Korobeynikov | 2009-10-21 | 1 | -14/+0 |
| | | | | | llvm-svn: 84773 | ||||
| * | Add InsertBranch() hook for tail mergeing | Anton Korobeynikov | 2009-05-03 | 1 | -0/+4 |
| | | | | | llvm-svn: 70754 | ||||
| * | Lower select with custom inserted and make condjumps generic | Anton Korobeynikov | 2009-05-03 | 1 | -2/+1 |
| | | | | | llvm-svn: 70744 | ||||
| * | Add first draft for conditions, conditional branches, etc | Anton Korobeynikov | 2009-05-03 | 1 | -0/+15 |
| | | | | | llvm-svn: 70743 | ||||
| * | Add code for save/restore of callee-saved registers | Anton Korobeynikov | 2009-05-03 | 1 | -1/+10 |
| | | | | | llvm-svn: 70739 | ||||
| * | First draft of stack slot loads / stores lowering | Anton Korobeynikov | 2009-05-03 | 1 | -0/+9 |
| | | | | | llvm-svn: 70735 | ||||
| * | Add code enough for emission of reg-reg and reg-imm moves. This allows us to ↵ | Anton Korobeynikov | 2009-05-03 | 1 | -0/+9 |
| | | | | | | | compile "ret i16 0" properly! llvm-svn: 70710 | ||||
| * | Dummy MSP430 backend | Anton Korobeynikov | 2009-05-03 | 1 | -0/+39 |
| llvm-svn: 70694 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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