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path: root/llvm/lib/Target/MBlaze/MBlazeRegisterInfo.cpp
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* Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper2012-08-221-1/+1
| | | | | | did getFunction()->getName(). Remove includes of Function.h that are no longer needed. llvm-svn: 162347
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-171-1/+1
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-041-2/+2
| | | | | | size of static data. llvm-svn: 151996
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-181-1/+1
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-201-2/+0
| | | | llvm-svn: 148578
* Refactoring fail.Evan Cheng2011-07-251-41/+0
| | | | llvm-svn: 135986
* More MC layering violations.Evan Cheng2011-07-251-51/+0
| | | | llvm-svn: 135978
* Refactor MBlaze target to separate MC routines from Target routines.Evan Cheng2011-07-251-65/+0
| | | | llvm-svn: 135953
* Move getInitialFrameState from TargetFrameInfo to MCAsmInfo (suggestions forEvan Cheng2011-07-181-1/+0
| | | | | | better location welcome). llvm-svn: 135438
* Sink getDwarfRegNum, getLLVMRegNum, getSEHRegNum from TargetRegisterInfo downEvan Cheng2011-07-181-13/+1
| | | | | | | | | to MCRegisterInfo. Also initialize the mapping at construction time. This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step towards fixing the layering violation. llvm-svn: 135424
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-141-1/+0
| | | | | | registeration and creation code into XXXMCDesc libraries. llvm-svn: 135184
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134030
* Hide more details in tablegen generated MCRegisterInfo ctor function.Evan Cheng2011-06-281-2/+1
| | | | llvm-svn: 134027
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-1/+4
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-5/+4
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-301-0/+4
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* Don't crash on invalid instructions when disassembling MBlaze code.Wesley Peck2011-04-111-0/+20
| | | | | | This fixes http://llvm.org/bugs/show_bug.cgi?id=9653 llvm-svn: 129303
* Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs ↵Anton Korobeynikov2011-01-101-5/+5
| | | | | | and fixes here and there. llvm-svn: 123170
* Remove dead code and silence warnings.Benjamin Kramer2011-01-061-4/+4
| | | | llvm-svn: 122957
* Fix more stack layout issues in the MBlaze backend.Wesley Peck2011-01-031-5/+0
| | | | llvm-svn: 122778
* Fix stack layout error in MBlaze backend.Wesley Peck2010-12-291-7/+14
| | | | llvm-svn: 122631
* Teach the MBlaze asm parser how to parse special purpose register names.Wesley Peck2010-12-201-32/+87
| | | | llvm-svn: 122261
* The ADD and ADDK (and all variants) instructions where flip-flopped in the ↵Wesley Peck2010-12-121-2/+2
| | | | | | MBlaze backend. This bug fix makes 64-bit math work on the MBlaze backend. llvm-svn: 121649
* 1. Change MBlaze indirect branches to use absolute branch BRALD instead of ↵Wesley Peck2010-12-121-4/+9
| | | | | | | | | pc relative branch BRLD. 2. Make sure that the MBlaze stack is aligned to 4-byte boundaries. 3. Determine frame indexes that should be placed in the callers stack frame, as per the MBlaze ABI, and place them in the correct locations. llvm-svn: 121639
* Reworking the stack layout generated by the MBlaze backend.Wesley Peck2010-12-091-7/+35
| | | | llvm-svn: 121355
* 1. Fixing error where basic block labels were not being printed out when ↵Wesley Peck2010-11-241-3/+2
| | | | | | | | | | they need to be for the MBlaze backend because AsmPrinter::isBlockOnlyReachableByFallthrough does not take into account delay slots. 2. Re-adding .mask and .frame directives in printed assembly. 3. Adding .ent and .end directives in printed assembly. 4. Minor cleanups to MBlaze backend. llvm-svn: 120095
* Move hasFP() and few related hooks to TargetFrameInfo.Anton Korobeynikov2010-11-181-9/+3
| | | | llvm-svn: 119740
* First step of huge frame-related refactoring: move emit{Prologue,Epilogue} ↵Anton Korobeynikov2010-11-151-146/+0
| | | | | | out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place llvm-svn: 119097
* 1. Finishing MBlaze MC asm parser test casesWesley Peck2010-11-121-5/+5
| | | | | | | | | | 2. Parsing .word directive in MBlaze asm parser 3. Fixing hack where memory instructions reversed order of last two parameters 4. Fixing many improperly encoded instructions 5. Support parsing special instructions (MFS,MTS,etc.) 6. Removing unused functions from inst printer llvm-svn: 118941
* Adding initial AsmParser implementation for the MBlaze backend. It isWesley Peck2010-10-211-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | mostly based on the ARM AsmParser at this time and is not particularly functional. Changed the MBlaze data layout from: "E-p:32:32-i8:8:8-i16:16:16-i64:32:32-f64:32:32-v64:32:32-v128:32:32-n32" to: "E-p:32:32:32-i8:8:8-i16:16:16" because the MicroBlaze doesn't have i64, f64, v64, or v128 data types. Cleaned up the MBlaze source code: 1. The floating point register class has been removed. The MicroBlaze does not have floating point registers. Floating point values are simply stored in integer registers. 2. Renaming the CPURegs register class to GPR to reflect the standard naming. 3. Removing a lot of stale code from AsmPrinter after the conversion to InstPrinter. 4. Simplified sign extended loads by marking them as expanded in ISelLowering. llvm-svn: 117054
* Simplify eliminateFrameIndex() interface back down now that PEI doesn't needJim Grosbach2010-08-261-3/+2
| | | | | | to try to re-use scavenged frame index reference registers. rdar://8277890 llvm-svn: 112241
* cleanupRafael Espindola2010-06-021-16/+0
| | | | llvm-svn: 105322
* Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe whatBill Wendling2010-05-141-6/+6
| | | | | | | | | the variable actually tracks. N.B., several back-ends are using "HasCalls" as being synonymous for something that adjusts the stack. This isn't 100% correct and should be looked into. llvm-svn: 103802
* Implement -disable-non-leaf-fp-elim which disable frame pointer eliminationEvan Cheng2010-04-211-1/+1
| | | | | | | optimization for non-leaf functions. This will be hooked up to gcc's -momit-leaf-frame-pointer option. rdar://7886181 llvm-svn: 101984
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-021-6/+5
| | | | llvm-svn: 100214
* Change the Value argument to eliminateFrameIndex to a type-tagged value. ThisJim Grosbach2010-03-091-1/+1
| | | | | | | | | | is preparatory to having PEI's scavenged frame index value reuse logic properly distinguish types of frame values (e.g., whether the value is stack-pointer relative or frame-pointer relative). No functionality change. llvm-svn: 98086
* Re-committing the failed r97807 commit with changes to eliminate warnings.Wesley Peck2010-03-061-7/+50
| | | | llvm-svn: 97891
* revert r97807, it introduced build warnings.Chris Lattner2010-03-061-50/+7
| | | | llvm-svn: 97869
* Reworking the stack layout that the MicroBlaze backend generates.Wesley Peck2010-03-051-7/+50
| | | | | | | | | | | The MicroBlaze backend was generating stack layouts that did not conform correctly to the ABI. This update generates stack layouts which are closer to what GCC does. Variable arguments support was added as well but the stack layout for varargs has not been finalized. llvm-svn: 97807
* Adding function "lookupGCCName" to MBlazeIntrinsicInfoWesley Peck2010-02-241-1/+1
| | | | | | | | | | | Adding the function "lookupGCCName" to the MBlazeIntrinsicInfo class to support the Clang MicroBlaze target. Additionally, minor fixes which remove some unused PIC code (PIC is not supported yet in the MicroBlaze backend) and removed some unused variables. llvm-svn: 97054
* Adding the MicroBlaze backend.Wesley Peck2010-02-231-0/+378
The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
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