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* Update the targets to the new SETCC/CondCodeSDNode interfaces.Chris Lattner2005-08-091-97/+91
| | | | llvm-svn: 22729
* Update to use the new MathExtras.h support for log2 computation.Chris Lattner2005-08-021-25/+4
| | | | | | Patch contributed by Jim Laskey! llvm-svn: 22594
* Eliminate all remaining tabs and trailing spaces.Jeff Cohen2005-07-271-84/+84
| | | | llvm-svn: 22523
* Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.Chris Lattner2005-07-101-4/+3
| | | | | | | | | | | | This is the last MVTSDNode. This allows us to eliminate a bunch of special case code for handling MVTSDNodes. Also, remove some uses of dyn_cast that should really be cast (which is cheaper in a release build). llvm-svn: 22368
* Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNodeChris Lattner2005-07-101-1/+1
| | | | llvm-svn: 22366
* Make several cleanups to Andrews varargs change:Chris Lattner2005-07-051-27/+16
| | | | | | | | | | | | 1. Pass Value*'s into lowering methods so that the proper pointers can be added to load/stores from the valist 2. Intrinsics that return void should only return a token chain, not a token chain/retval pair. 3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone. 4. Now that we have Value*'s available in the lowering methods, pass them into any load/stores from the valist that are emitted llvm-svn: 22339
* Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFileChris Lattner2005-06-252-4/+8
| | | | | | interface. llvm-svn: 22282
* If we support structs as va_list, we must pass pointers to them to va_copyAndrew Lenharth2005-06-221-13/+0
| | | | | | See last commit for LangRef, this implements it on all targets. llvm-svn: 22273
* core changes for varargsAndrew Lenharth2005-06-181-21/+35
| | | | llvm-svn: 22254
* re-enable direct calls, this should just be a performance boostDuraid Madina2005-05-201-6/+5
| | | | llvm-svn: 22148
* make angry compilers happy againDuraid Madina2005-05-151-1/+2
| | | | llvm-svn: 22054
* treat TAILCALL nodes identically to CALL nodesChris Lattner2005-05-131-1/+3
| | | | llvm-svn: 21977
* Add an isTailCall flag to LowerCallToChris Lattner2005-05-131-2/+3
| | | | llvm-svn: 21958
* rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.Chris Lattner2005-05-121-6/+6
| | | | llvm-svn: 21915
* Pass in Calling Convention to use into LowerCallToChris Lattner2005-05-121-1/+2
| | | | llvm-svn: 21899
* add the popcount instruction and support this in the iselDuraid Madina2005-05-112-1/+8
| | | | | | | the primary user of this will probably end up being find-first-set-bit/find- last-set-bit, which i'll get around to... llvm-svn: 21860
* No really IA*64* :)Chris Lattner2005-05-111-3/+3
| | | | llvm-svn: 21858
* fix and cleanup constmul code a bit, this fixes mediabench/toast andDuraid Madina2005-05-091-13/+10
| | | | | | probably a couple of other tests. llvm-svn: 21814
* fix typoAndrew Lenharth2005-05-041-0/+5
| | | | llvm-svn: 21693
* support multiplication by constant negative integersDuraid Madina2005-05-021-4/+13
| | | | | | | this constmul code is still buggy though, so beware. mul by 7427 is currently broken, for example. will fix it when I get a moment :) llvm-svn: 21652
* add support for bools to SELECT, this fixes Prolangs-C/bison from theDuraid Madina2005-05-021-6/+35
| | | | | | testsuite, however 09-vor is still dead (hopefully for other reasons!) llvm-svn: 21651
* This target doesn't support the FSIN/FCOS/FSQRT nodes yetChris Lattner2005-04-301-0/+8
| | | | llvm-svn: 21633
* Implement Value* tracking for loads and stores in the selection DAG. This ↵Andrew Lenharth2005-04-271-2/+2
| | | | | | | | enables one to use alias analysis in the backends. (TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null. llvm-svn: 21599
* clean up some warningsDuraid Madina2005-04-271-15/+15
| | | | llvm-svn: 21590
* constmul bugfix: multiply by 27611 was brokenDuraid Madina2005-04-261-11/+10
| | | | llvm-svn: 21564
* clean up the code! (oops) lots more cleaning left, however.Duraid Madina2005-04-261-22/+0
| | | | llvm-svn: 21563
* * Add code to reduce multiplies by constant integers to shifts, adds andDuraid Madina2005-04-261-15/+439
| | | | | | | | | | | | | | | | | | | | | | | | subtracts. This is a very rough and nasty implementation of Lefevre's "pattern finding" algorithm. With a few small changes though, it should end up beating most other methods in common use, regardless of the size of the constant (currently, it's often one or two shifts worse) TODO: rewrite it so it's not hideously ugly (this is a translation from perl, which doesn't help ;) bypass most of it for multiplies by 2^n+1 (eventually) teach it that some combinations of shift+add are cheaper than others (e.g. shladd on ia64, scaled adds on alpha) get it to try multiple booth encodings in search of the cheapest routine make it work for negative constants This is hacked up as a DAG->DAG transform, so once I clean it up I hope it'll be pulled out of here and put somewhere else. The only thing backends should really have to worry about for now is where to draw the line between using this code vs. going ahead and doing an integer multiply anyway. llvm-svn: 21560
* Convert tabs to spacesMisha Brukman2005-04-225-479/+478
| | | | llvm-svn: 21452
* Remove trailing whitespaceMisha Brukman2005-04-2111-174/+174
| | | | llvm-svn: 21424
* print negative 64 bit immediates as negative numbers, makes things a littleDuraid Madina2005-04-142-2/+9
| | | | | | | easier on the eyes, not that numbers like 18446744073709541376 are bad or anything llvm-svn: 21300
* oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21299
* we have zextloads, not sextloads!Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21296
* * add the shladd instructionDuraid Madina2005-04-132-0/+23
| | | | | | | | | | * fold left shifts of 1, 2, 3 or 4 bits into adds This doesn't save much now, but should get a serious workout once multiplies by constants get converted to shift/add/sub sequences. Hold on! :) llvm-svn: 21282
* * if ANDing with a constant of the form:Duraid Madina2005-04-131-2/+45
| | | | | | | | | | | | | | | | | | | 0x00000..00FFF..FF ^ ^ ^ ^ any number of 0's followed by some number of 1's then we use dep.z to just paste zeros over the input. For the special cases where this is zxt1/zxt2/zxt4, we use those instructions instead, because we're all about readability!!! that's what it's about!! readability! *twitch* ;D llvm-svn: 21279
* Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causingChris Lattner2005-04-131-17/+0
| | | | | | | | | | | | | | | things like this: mov r9 = 65535;; and r8 = r8, r9;; To be emitted instead of: zxt2 r8 = r8;; To get this back, the selector for ISD::AND should recognize this case. llvm-svn: 21269
* * OK, after changing to use liveIn/liveOut instead of IDEFs,Duraid Madina2005-04-122-5/+18
| | | | | | | | | | | | | | | | | | | to avoid redundant mov out3=r44 type instructions, we need to tell the register allocator the truth about out? registers. FIXME: unfortunately, since the list of allocatable registers is immutable, we can't simply 'delete r127' from the allocation order, say, if 'out0' is used. The only correct thing we can do is have a linear order of regs: out7, out6 ... out2, out1, out0, r32, r33, r34 ... r126, r127 and slide a 'window' of 96 registers along this line, depending on how many of the out? regs a function actually uses. The only downside of this is that the out? registers will be allocated _first_, which makes the resulting assembly ugly. :( Note this in the README. Hope this gets fixed soon. :) (note the 3rd person speech there) llvm-svn: 21252
* Put out* into the allocation order, allowing the register allocator toChris Lattner2005-04-121-4/+3
| | | | | | coallesce moves into outgoing args. llvm-svn: 21249
* Make sure to realize that calls use their argument regsChris Lattner2005-04-121-0/+1
| | | | llvm-svn: 21248
* stop emitting IDEFs for args - change to using liveIn/liveOutDuraid Madina2005-04-122-4/+31
| | | | llvm-svn: 21247
* IA64 supports this operation.Chris Lattner2005-04-111-1/+0
| | | | llvm-svn: 21228
* hmm, should probably change addImm() to take 64-bit arguments one day anyway.Duraid Madina2005-04-111-1/+1
| | | | llvm-svn: 21224
* assorted fixes:Duraid Madina2005-04-114-66/+78
| | | | | | | | | | | * clean up immediates (we use 14, 22 and 64 bit immediates now. sane.) * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0 * fix nasty thinko - didn't use two-address form of conditional add for extending bools to integers, so occasionally there would be garbage in the result. it's amazing how often zeros are just sitting around in registers ;) - this should fix a bunch of tests. llvm-svn: 21221
* ok, the "ia64 has a boatload of registers" joke stopped being funny today ;)Duraid Madina2005-04-091-1/+6
| | | | | | | | | | * fix overallocation of integer (stacked) registers: we can't allocate registers for local use if they are required as output registers this fixes 'toast' in the test suite, and all sorts of larger programs like bzip2 etc. llvm-svn: 21178
* This target does not support/want ISD::BRCONDTWOWAYChris Lattner2005-04-091-0/+1
| | | | llvm-svn: 21164
* fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)Duraid Madina2005-04-082-15/+25
| | | | | | fix hack in division (clean up frcpa instruction) llvm-svn: 21153
* teach asmprinter to print s8/s14 operandsDuraid Madina2005-04-071-0/+12
| | | | llvm-svn: 21131
* codegen immediate forms of add/sub/shiftDuraid Madina2005-04-071-13/+66
| | | | llvm-svn: 21130
* add immediate forms of add, sub, shiftDuraid Madina2005-04-071-0/+14
| | | | llvm-svn: 21129
* steal sampo's div-by-constant-power-of-2 stuffDuraid Madina2005-04-061-4/+66
| | | | | | thanks sampo!! llvm-svn: 21113
* add fms instructionDuraid Madina2005-04-061-0/+2
| | | | llvm-svn: 21112
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