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* * Add code to reduce multiplies by constant integers to shifts, adds andDuraid Madina2005-04-261-15/+439
| | | | | | | | | | | | | | | | | | | | | | | | subtracts. This is a very rough and nasty implementation of Lefevre's "pattern finding" algorithm. With a few small changes though, it should end up beating most other methods in common use, regardless of the size of the constant (currently, it's often one or two shifts worse) TODO: rewrite it so it's not hideously ugly (this is a translation from perl, which doesn't help ;) bypass most of it for multiplies by 2^n+1 (eventually) teach it that some combinations of shift+add are cheaper than others (e.g. shladd on ia64, scaled adds on alpha) get it to try multiple booth encodings in search of the cheapest routine make it work for negative constants This is hacked up as a DAG->DAG transform, so once I clean it up I hope it'll be pulled out of here and put somewhere else. The only thing backends should really have to worry about for now is where to draw the line between using this code vs. going ahead and doing an integer multiply anyway. llvm-svn: 21560
* Convert tabs to spacesMisha Brukman2005-04-221-452/+451
| | | | llvm-svn: 21452
* Remove trailing whitespaceMisha Brukman2005-04-211-111/+111
| | | | llvm-svn: 21424
* oops, this stopped us turning movl r4=0xFFFFFFFF;; and rX, r4 into zxt4Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21299
* we have zextloads, not sextloads!Duraid Madina2005-04-141-1/+1
| | | | llvm-svn: 21296
* * add the shladd instructionDuraid Madina2005-04-131-0/+20
| | | | | | | | | | * fold left shifts of 1, 2, 3 or 4 bits into adds This doesn't save much now, but should get a serious workout once multiplies by constants get converted to shift/add/sub sequences. Hold on! :) llvm-svn: 21282
* * if ANDing with a constant of the form:Duraid Madina2005-04-131-2/+45
| | | | | | | | | | | | | | | | | | | 0x00000..00FFF..FF ^ ^ ^ ^ any number of 0's followed by some number of 1's then we use dep.z to just paste zeros over the input. For the special cases where this is zxt1/zxt2/zxt4, we use those instructions instead, because we're all about readability!!! that's what it's about!! readability! *twitch* ;D llvm-svn: 21279
* Remove special handling of ZERO_EXTEND_INREG. This pessimizes code, causingChris Lattner2005-04-131-17/+0
| | | | | | | | | | | | | | | things like this: mov r9 = 65535;; and r8 = r8, r9;; To be emitted instead of: zxt2 r8 = r8;; To get this back, the selector for ISD::AND should recognize this case. llvm-svn: 21269
* stop emitting IDEFs for args - change to using liveIn/liveOutDuraid Madina2005-04-121-2/+27
| | | | llvm-svn: 21247
* IA64 supports this operation.Chris Lattner2005-04-111-1/+0
| | | | llvm-svn: 21228
* hmm, should probably change addImm() to take 64-bit arguments one day anyway.Duraid Madina2005-04-111-1/+1
| | | | llvm-svn: 21224
* assorted fixes:Duraid Madina2005-04-111-22/+57
| | | | | | | | | | | * clean up immediates (we use 14, 22 and 64 bit immediates now. sane.) * fold r0/f0/f1 registers into comparisons against 0/0.0/1.0 * fix nasty thinko - didn't use two-address form of conditional add for extending bools to integers, so occasionally there would be garbage in the result. it's amazing how often zeros are just sitting around in registers ;) - this should fix a bunch of tests. llvm-svn: 21221
* This target does not support/want ISD::BRCONDTWOWAYChris Lattner2005-04-091-0/+1
| | | | llvm-svn: 21164
* fix bogus division-by-power-of-2 (was wrong for negative input, adds extr insn)Duraid Madina2005-04-081-7/+20
| | | | | | fix hack in division (clean up frcpa instruction) llvm-svn: 21153
* codegen immediate forms of add/sub/shiftDuraid Madina2005-04-071-13/+66
| | | | llvm-svn: 21130
* steal sampo's div-by-constant-power-of-2 stuffDuraid Madina2005-04-061-4/+66
| | | | | | thanks sampo!! llvm-svn: 21113
* fix SREM/UREM, which gave incorrect results for x%y if x was zero. This isDuraid Madina2005-04-041-1/+13
| | | | | | | | | an ugly hack, but it seems to work. I should fix this properly and add a test as well. fixes multisource/obsequi (maybe others) llvm-svn: 21075
* support IDEF, fnegabs (thanks sampo)Duraid Madina2005-04-021-2/+14
| | | | llvm-svn: 21023
* add support FNEG and FABSDuraid Madina2005-04-021-5/+15
| | | | llvm-svn: 21012
* This target doesn't support fabs/fneg yet.Chris Lattner2005-04-021-0/+3
| | | | llvm-svn: 21010
* repair mindless SELECT waste.Duraid Madina2005-04-011-15/+5
| | | | llvm-svn: 20982
* Assorted fixes:Duraid Madina2005-03-311-38/+135
| | | | | | | | | | | | | | | | | * Stop being pessimistic about output register allocation * Start to handle function descriptors: compute target GPs and so on when doing indirect calls etc. Not there yet, though. For the moment, we try to use _indirect_ branches wherever possible, to stress test function descriptors. * FP divide-by-zero should work now * add varargs (it doesn't work, though) At this point, all of SingleSource passes (modulo C++ tests that are due to issues with the CFE, see note in the README.) Much of MultiSource also passes although there's still a ton of bugs around. Something for me to work on tomorrow, then. :) llvm-svn: 20960
* Change interface to LowerCallTo to take a boolean isVarArg argument.Nate Begeman2005-03-261-4/+4
| | | | llvm-svn: 20842
* Remove comments that are now meaningless from the pattern ISels, at Chris'sNate Begeman2005-03-241-2/+1
| | | | | | request. llvm-svn: 20804
* Stop using deprecated interface.Alkis Evlogimenos2005-03-191-1/+1
| | | | llvm-svn: 20679
* clean up warnings when building in release modeDuraid Madina2005-03-171-0/+2
| | | | llvm-svn: 20658
* and so it begins...Duraid Madina2005-03-171-0/+1640
PHASE 1: write instruction selector PHASE 2: ??? PHASE 3: profit! llvm-svn: 20652
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