summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Match tblgen changes.Evan Cheng2006-08-261-30/+38
| | | | llvm-svn: 29895
* SelectNodeTo() may return a SDOperand that is different from the input.Evan Cheng2006-08-161-31/+20
| | | | llvm-svn: 29726
* Match tablegen changes.Evan Cheng2006-08-111-25/+21
| | | | llvm-svn: 29604
* Match tablegen isel changes.Evan Cheng2006-08-071-70/+28
| | | | llvm-svn: 29549
* Remove InFlightSet hack. No longer needed.Evan Cheng2006-07-281-1/+0
| | | | llvm-svn: 29373
* Remove NodeDepthEvan Cheng2006-07-271-6/+1
| | | | llvm-svn: 29338
* It was pointed out that DEBUG() is only available with -debug.Jim Laskey2006-07-111-1/+5
| | | | llvm-svn: 29106
* Ensure that dump calls that are associated with asserts are removed fromJim Laskey2006-07-111-1/+1
| | | | | | non-debug build. llvm-svn: 29105
* Assert if InflightSet is not cleared after instruction selecting a BB.Evan Cheng2006-05-251-0/+1
| | | | llvm-svn: 28459
* Clear HandleMap and ReplaceMap after instruction selection. Or it may causeEvan Cheng2006-05-241-0/+2
| | | | | | non-deterministic behavior. llvm-svn: 28454
* Move this code to a common placeAndrew Lenharth2006-05-161-3/+0
| | | | llvm-svn: 28329
* #include Intrinsics.h into all dag iselsChris Lattner2006-03-251-0/+1
| | | | llvm-svn: 27109
* Added getTargetLowering() to TargetMachine. Refactored targets to support this.Evan Cheng2006-03-131-3/+4
| | | | llvm-svn: 26742
* fix storing booleans (grawp missed this one)Duraid Madina2006-02-111-3/+3
| | | | llvm-svn: 26120
* Match getTargetNode() changes (now return SDNode* instead of SDOperand).Evan Cheng2006-02-091-64/+78
| | | | llvm-svn: 26085
* Change Select() fromEvan Cheng2006-02-091-48/+82
| | | | | | | | SDOperand Select(SDOperand N); to void Select(SDOperand &Result, SDOperand N); llvm-svn: 26067
* Use SelectRoot() as entry of any tblgen based isel.Evan Cheng2006-02-051-1/+2
| | | | llvm-svn: 25997
* Allow the specification of explicit alignments for constant pool entries.Evan Cheng2006-01-311-2/+4
| | | | llvm-svn: 25855
* Targets all now request ConstantFP to be legalized into TargetConstantFP.Chris Lattner2006-01-291-1/+1
| | | | | | 'fpimm' in .td files is now TargetConstantFP. llvm-svn: 25771
* Remove some dead codeChris Lattner2006-01-281-30/+0
| | | | llvm-svn: 25719
* Add explicit #includes of <iostream>Chris Lattner2006-01-221-0/+1
| | | | llvm-svn: 25515
* insignificant, but next up is proper stack frame layout!Duraid Madina2006-01-211-1/+2
| | | | llvm-svn: 25497
* remove RET hack, add proper support for rets (watching out for ret voids)Duraid Madina2006-01-201-51/+0
| | | | llvm-svn: 25486
* fix sext breakage: now we correctly deal with functions that returnDuraid Madina2006-01-201-1/+1
| | | | | | int vs uint llvm-svn: 25478
* fix storing bools! eek!Duraid Madina2006-01-201-2/+2
| | | | llvm-svn: 25476
* oops, this shouldn't have gotten inDuraid Madina2006-01-171-2/+0
| | | | llvm-svn: 25388
* fixing dividesDuraid Madina2006-01-171-12/+9
| | | | llvm-svn: 25383
* fixing divides: FP should now be 100%, and integers are fine tooDuraid Madina2006-01-161-17/+24
| | | | | | | unless you try to div/mod 0 by anything, in which case you will get some cute number, and not 0, which is bad. llvm-svn: 25358
* fix division! again!! pattern isel, prepare to die.Duraid Madina2006-01-161-101/+97
| | | | llvm-svn: 25353
* explain that r12 is the stack pointer regDuraid Madina2006-01-151-32/+2
| | | | llvm-svn: 25336
* don't be a doofus - this fixes storing boolsDuraid Madina2006-01-131-2/+5
| | | | llvm-svn: 25274
* tblgen does this nowChris Lattner2006-01-111-2/+0
| | | | llvm-svn: 25220
* cleanup GETFDDuraid Madina2006-01-111-4/+3
| | | | llvm-svn: 25198
* unbreak calls, a few more tests should run. Tomorrow: bugpoint!Duraid Madina2005-12-251-2/+1
| | | | llvm-svn: 25010
* this is a hack, which may or may not hang around. In short:Duraid Madina2005-12-221-0/+67
| | | | | | | | | | whimper out of doing things the Right Way, and hack up a generic 'BRCALL' instruction, that gets generated when calls are lowered. This gets selected by hand in the DAG isel, where it gets turned into real (i.e. in tablegen) br.call instructions. BUG: this dies on void calls, but seems to work otherwise? llvm-svn: 24952
* we can't do this directly in lowering, so we need this caseDuraid Madina2005-12-221-0/+8
| | | | llvm-svn: 24951
* kill SelectCALL() in the DAG isel, we handle this in lowering now, likeDuraid Madina2005-12-221-189/+47
| | | | | | | SPARCv8. (we copy sparcv8's workaround for tablegen not being nice about ISD::CALL/TAILCALL) llvm-svn: 24941
* Pay attn to the node returned by SelectNodeToChris Lattner2005-11-301-37/+28
| | | | llvm-svn: 24551
* add support for dynamic_stackalloc to the dag isel (thanks andrew ;)Duraid Madina2005-11-251-3/+31
| | | | | | next up: support argument passing in memory, not just registers llvm-svn: 24490
* add support for div/rem to the dag->dag isel. yay.Duraid Madina2005-11-211-0/+180
| | | | llvm-svn: 24472
* add support for storing and returning boolsDuraid Madina2005-11-071-5/+26
| | | | llvm-svn: 24228
* just some random hacking - calls (particularly indirect) need a lot ofDuraid Madina2005-11-061-14/+25
| | | | | | love (especially with -sched=simple) llvm-svn: 24225
* oops, forgot to load GP for indirect calls, though the old code now commentedDuraid Madina2005-11-041-4/+21
| | | | | | | | | out failed (e.g. methcall) - now the code compiles, though it's not quite right just yet (tm) ;) would fix this but it's 3am! :O llvm-svn: 24186
* add support for loading boolsDuraid Madina2005-11-041-1/+7
| | | | llvm-svn: 24182
* "fix" support for FP constants (this code asserts in the scheduler,Duraid Madina2005-11-021-2/+4
| | | | | | though) llvm-svn: 24152
* add support for loading FP constants +0.0 and +1.0 to the dag isel,Duraid Madina2005-11-021-0/+8
| | | | | | stop pretending -0.0 and -1.0 are machine constants llvm-svn: 24146
* FORTRAN!!! :( and other similarly unfortunate things mean that on ia64Duraid Madina2005-11-011-0/+20
| | | | | | one sometimes needs to pass FP args in both FP *and* integer registers. llvm-svn: 24134
* add some FP stuff, some mix.* stuff, and constant pool support to theDuraid Madina2005-10-291-0/+7
| | | | | | | DAG instruction selector, which should be destroyed one day (in the pattern isel also) since ia64 can pack any constant in the instruction stream llvm-svn: 24094
* These are autogeneratedChris Lattner2005-10-281-33/+0
| | | | llvm-svn: 24063
* DAG->DAG instruction selection for ia64! "hello world" works, not much else.Duraid Madina2005-10-281-0/+497
use -enable-ia64-dag-isel to turn this on TODO: delete lowering stuff from the pattern isel : get operations on predicate bits working : get other bits of pseudocode going : use sampo's mulh/mull-using divide-by-constant magic : *so* many patterns ("extr", "tbit" and "dep" will be fun :) : add FP : add a JIT! : get it working 100% in short: this'll be happier in a couple of weeks, but it's here now so the tester can make me feel guilty sooner. OTHER: there are a couple of fixes to the pattern isel, in particular making the linker happy with big blobs of fun like pypy. llvm-svn: 24058
OpenPOWER on IntegriCloud