summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Hexagon
Commit message (Collapse)AuthorAgeFilesLines
* Prune some includesCraig Topper2012-03-271-1/+0
| | | | llvm-svn: 153502
* Remove some unnecessary forward declarations.Craig Topper2012-03-221-1/+0
| | | | llvm-svn: 153245
* Reorder includes in Target backends to following coding standards. Remove ↵Craig Topper2012-03-1714-25/+21
| | | | | | some superfluous forward declarations. llvm-svn: 152997
* Fix some copy and paste remnants of Cell and SPU in Hexagon files.Craig Topper2012-03-174-6/+6
| | | | llvm-svn: 152981
* Fix typo in file header.Craig Topper2012-03-171-1/+1
| | | | llvm-svn: 152980
* Pass TargetOptions to HexagonTargetMachine constructor by reference to match ↵Craig Topper2012-03-172-3/+4
| | | | | | other targets and the base class. llvm-svn: 152979
* Convert more static tables of registers used by calling convention to ↵Craig Topper2012-03-111-3/+3
| | | | | | uint16_t to reduce space. llvm-svn: 152538
* Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce ↵Craig Topper2012-03-051-4/+4
| | | | | | static data size. llvm-svn: 152016
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
| | | | llvm-svn: 152001
* Use uint16_t to store registers in callee saved register tables to reduce ↵Craig Topper2012-03-042-5/+5
| | | | | | size of static data. llvm-svn: 151996
* Re-commit r151623 with fix. Only issue special no-return calls if it's a ↵Evan Cheng2012-02-282-2/+2
| | | | | | direct call. llvm-svn: 151645
* Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack ↵Daniel Dunbar2012-02-282-2/+2
| | | | | | prediction. ...", it is breaking the Clang build during the Compiler-RT part. llvm-svn: 151630
* Some ARM implementaions, e.g. A-series, does return stack prediction. That is,Evan Cheng2012-02-282-2/+2
| | | | | | | | | | | | | | | | | the processor keeps a return addresses stack (RAS) which stores the address and the instruction execution state of the instruction after a function-call type branch instruction. Calling a "noreturn" function with normal call instructions (e.g. bl) can corrupt RAS and causes 100% return misprediction so LLVM should use a unconditional branch instead. i.e. mov lr, pc b _foo The "mov lr, pc" is issued in order to get proper backtrace. rdar://8979299 llvm-svn: 151623
* Delete incorrect reference to inexistent Hexagon architecture manuals.Evandro Menezes2012-02-271-3/+0
| | | | llvm-svn: 151582
* Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear ↵Craig Topper2012-02-271-1/+0
| | | | | | in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen. llvm-svn: 151514
* Remove unused cl::opt, make another opt static.Benjamin Kramer2012-02-241-3/+0
| | | | llvm-svn: 151398
* Fix the numbering of some of the registers and reclassify a couple of them.Brendon Cahoon2012-02-231-66/+64
| | | | | | Also, some basic clean up. Patch by Evandro Menezes. llvm-svn: 151266
* Efficient pattern for store truncate. Patch by Evandro Menezes.Sirish Pande2012-02-224-22/+7
| | | | llvm-svn: 151166
* Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, ↵Jia Liu2012-02-1828-39/+40
| | | | | | MSP430, PPC, PTX, Sparc, X86, XCore. llvm-svn: 150878
* Optimize redundant sign extends and negation of predicates.Sirish Pande2012-02-1515-209/+1037
| | | | llvm-svn: 150606
* Revert "Replacing HexagonOptimizeSZExtends with HexagonPeephole."Eric Christopher2012-02-152-292/+129
| | | | | | This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741. llvm-svn: 150605
* Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher2012-02-1513-745/+80
| | | | | | | | as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. llvm-svn: 150604
* Replacing HexagonOptimizeSZExtends with HexagonPeephole.Sirish Pande2012-02-152-129/+292
| | | | llvm-svn: 150603
* Optimize redundant sign extends and negation of predicatesSirish Pande2012-02-1513-80/+745
| | | | llvm-svn: 150601
* Test for commit access.Sirish Pande2012-02-091-2/+2
| | | | llvm-svn: 150178
* Codegen pass definition cleanup. No functionality.Andrew Trick2012-02-081-1/+1
| | | | | | | | | | | | | Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). llvm-svn: 150100
* Use TSFlag bit to describe instruction properties.Brendon Cahoon2012-02-086-314/+208
| | | | | | | | Creating the isPredicated TSFlag enables the code to use the property defined in the instruction format instead of using a large switch statement. llvm-svn: 150078
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-076-28/+21
| | | | llvm-svn: 149961
* Hexagon: Remove forbidden iostream includes (it introduces static initializers)Benjamin Kramer2012-02-068-73/+46
| | | | | | Reorder includes while at it. llvm-svn: 149863
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-0/+1
| | | | llvm-svn: 149814
* TargetPassConfig: confine the MC configuration to TargetMachine.Andrew Trick2012-02-042-8/+5
| | | | | | | | | | Passes prior to instructon selection are now split into separate configurable stages. Header dependencies are simplified. The bulk of this diff is simply removal of the silly DisableVerify flags. Sorry for the target header churn. Attempting to stabilize them. llvm-svn: 149754
* Added TargetPassConfig. The first little step toward configuring codegen passes.Andrew Trick2012-02-032-15/+37
| | | | | | | | | | | Allows command line overrides to be centralized in LLVMTargetMachine.cpp. LLVMTargetMachine can intercept common passes and give precedence to command line overrides. Allows adding "internal" target configuration options without touching TargetOptions. Encapsulates the PassManager. Provides a good point to initialize all CodeGen passes so that Pass ID's can be used in APIs. Allows modifying the target configuration hooks without rebuilding the world. llvm-svn: 149672
* Fix the cmake buildRafael Espindola2012-02-011-0/+1
| | | | llvm-svn: 149561
* VLIW specific scheduler framework that utilizes deterministic finite ↵Andrew Trick2012-02-015-0/+42
| | | | | | | | | | automaton (DFA). This new scheduler plugs into the existing selection DAG scheduling framework. It is a top-down critical path scheduler that tracks register pressure and uses a DFA for pipeline modeling. Patch by Sergei Larin! llvm-svn: 149547
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-204-7/+0
| | | | llvm-svn: 148578
* Add a CoveredBySubRegs property to Register descriptions.Jakob Stoklund Olesen2012-01-181-1/+1
| | | | | | | | | | | | | | | | When set, this bit indicates that a register is completely defined by the value of its sub-registers. Use the CoveredBySubRegs property to infer which super-registers are call-preserved given a list of callee-saved registers. For example, the ARM registers D8-D15 are callee-saved. This now automatically implies that Q4-Q7 are call-preserved. Conversely, Win64 callees save XMM6-XMM15, but the corresponding YMM6-YMM15 registers are not call-preserved because they are not fully defined by their sub-registers. llvm-svn: 148363
* Initializing to false makes better sense. Thanks, David.Chad Rosier2012-01-061-1/+1
| | | | llvm-svn: 147679
* Fix uninitialized variable warning.Chad Rosier2012-01-061-1/+1
| | | | llvm-svn: 147675
* Clean up some Release build warnings.Benjamin Kramer2011-12-273-24/+14
| | | | llvm-svn: 147289
* Hexagon: Remove unused variables.Benjamin Kramer2011-12-182-13/+0
| | | | llvm-svn: 146846
* Hexagon: Fix a nasty order-of-initialization bug.Benjamin Kramer2011-12-162-2/+2
| | | | | | Reenable the tests. llvm-svn: 146750
* Target/Hexagon: Fix CMake build.NAKAMURA Takumi2011-12-161-1/+0
| | | | llvm-svn: 146724
* Add MCTargetDesc library to Hexagon targetTony Linthicum2011-12-1515-30/+186
| | | | llvm-svn: 146692
* Initial CodeGen support for CTTZ/CTLZ where a zero input produces anChandler Carruth2011-12-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | undefined result. This adds new ISD nodes for the new semantics, selecting them when the LLVM intrinsic indicates that the undef behavior is desired. The new nodes expand trivially to the old nodes, so targets don't actually need to do anything to support these new nodes besides indicating that they should be expanded. I've done this for all the operand types that I could figure out for all the targets. Owners of various targets, please review and let me know if any of these are incorrect. Note that the expand behavior is *conservatively correct*, and exactly matches LLVM's current behavior with these operations. Ideally this patch will not change behavior in any way. For example the regtest suite finds the exact same instruction sequences coming out of the code generator. That's why there are no new tests here -- all of this is being exercised by the existing test suite. Thanks to Duncan Sands for reviewing the various bits of this patch and helping me get the wrinkles ironed out with expanding for each target. Also thanks to Chris for clarifying through all the discussions that this is indeed the approach he was looking for. That said, there are likely still rough spots. Further review much appreciated. llvm-svn: 146466
* Target/Hexagon: Fix CMake build. We don't use add_llvm_library_dependencies().NAKAMURA Takumi2011-12-132-16/+0
| | | | llvm-svn: 146457
* LLVMBuild: Introduce a common section which currently has a list of theDaniel Dunbar2011-12-122-3/+4
| | | | | | | | | | | subdirectories to traverse into. - Originally I wanted to avoid this and just autoscan, but this has one key flaw in that new subdirectories can not automatically trigger a rerun of the llvm-build tool. This is particularly a pain when switching back and forth between trees where one has added a subdirectory, as the dependencies will tend to be wrong. This will also eliminates FIXME implicitly. llvm-svn: 146436
* fix warningTony Linthicum2011-12-121-1/+1
| | | | llvm-svn: 146420
* Hexagon backend supportTony Linthicum2011-12-1254-0/+20764
llvm-svn: 146412
OpenPOWER on IntegriCloud