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path: root/llvm/lib/Target/Hexagon/RDFGraph.cpp
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* [RDF] Only access block live-ins when tracking livenessKrzysztof Parzyszek2017-02-221-2/+4
| | | | llvm-svn: 295855
* Fix -Wunused-lambda-capture by removing some unused lambda capturesDavid Blaikie2017-02-161-2/+2
| | | | llvm-svn: 295373
* [RDF] Differentiate between defining and clobbering nodesKrzysztof Parzyszek2017-02-161-9/+81
| | | | | | | | | | Defining nodes should not alias with one another, while clobbering nodes can. When pushing defs on stacks, push clobbers first, link non-clobbering defs, then push the defs. The data flow in a statement is now: uses -> clobbers -> defs. llvm-svn: 295356
* [RDF] Move normalize(RegisterRef) to PhysicalRegisterInfoKrzysztof Parzyszek2017-02-161-18/+2
| | | | | | Remove the duplicate from DFG and make some members of PRI private. llvm-svn: 295351
* [RDF] Add support for regmasksKrzysztof Parzyszek2017-01-301-43/+73
| | | | llvm-svn: 293538
* [RDF] Extract the physical register information into a separate classKrzysztof Parzyszek2017-01-301-161/+6
| | | | llvm-svn: 293510
* [RDF] Add phis for entry block live-ins (in addition to function live-ins)Krzysztof Parzyszek2017-01-301-4/+12
| | | | llvm-svn: 293491
* Remove unused lambda captures. NFCMalcolm Parsons2017-01-131-1/+1
| | | | llvm-svn: 291916
* [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use ↵Eugene Zelenko2017-01-041-27/+33
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 290925
* Implement LaneBitmask::any(), use it to replace !none(), NFCIKrzysztof Parzyszek2016-12-161-4/+4
| | | | llvm-svn: 289974
* Extract LaneBitmask into a separate typeKrzysztof Parzyszek2016-12-151-8/+8
| | | | | | | | | | | | Specifically avoid implicit conversions from/to integral types to avoid potential errors when changing the underlying type. For example, a typical initialization of a "full" mask was "LaneMask = ~0u", which would result in a value of 0x00000000FFFFFFFF if the type was extended to uint64_t. Differential Revision: https://reviews.llvm.org/D27454 llvm-svn: 289820
* [RDF] Fix incorrect lane mask calculationKrzysztof Parzyszek2016-12-081-7/+31
| | | | | | | | This was exposed by some code that used more than one level of sub- registers. There is no testcase, because there is no such code in the Hexagon backend. llvm-svn: 289099
* Timer: Track name and description.Matthias Braun2016-11-181-2/+1
| | | | | | | | | | | | | The previously used "names" are rather descriptions (they use multiple words and contain spaces), use short programming language identifier like strings for the "names" which should be used when exporting to machine parseable formats. Also removed a unused TimerGroup from Hexxagon. Differential Revision: https://reviews.llvm.org/D25583 llvm-svn: 287369
* [RDF] Use RegisterId typedef more consistently, NFCKrzysztof Parzyszek2016-10-211-8/+8
| | | | llvm-svn: 284857
* [RDF] Switch RefMap in liveness calculation to use lane masksKrzysztof Parzyszek2016-10-191-3/+56
| | | | | | | | | | This required reengineering of some of the part of liveness calculation, including fixing some issues caused by the limitations of the previous approach. The current code is not necessarily the fastest, but it should be functionally correct (at least more so than before). The compile-time performance will be addressed in the future. llvm-svn: 284609
* The real fix for post-r284255 failuresKrzysztof Parzyszek2016-10-141-2/+2
| | | | llvm-svn: 284264
* [RDF] Switch RegisterRef to be a pair (Register, LaneMask)Krzysztof Parzyszek2016-10-141-138/+107
| | | | | | | | | Use PackedRegisterRef to store the register information in the graph nodes. This commit also removes support for virtual registers. It has never been tested or used. It will be possible to add it back if there is a need. llvm-svn: 284255
* [RDF] Replace potentially unclear autos with real typesKrzysztof Parzyszek2016-10-061-32/+27
| | | | llvm-svn: 283445
* [RDF] Further improve readability of the graphKrzysztof Parzyszek2016-10-031-11/+14
| | | | | | Print target basic block for a branch. llvm-svn: 283126
* [RDF] Replace RegisterAliasInfo with target-independent code using lane masksKrzysztof Parzyszek2016-10-031-208/+237
| | | | llvm-svn: 283122
* [RDF] Add "dead" flag to node attributesKrzysztof Parzyszek2016-09-271-1/+8
| | | | llvm-svn: 282520
* [RDF] Special treatment of exception handling registersKrzysztof Parzyszek2016-09-271-3/+63
| | | | | | | | | | | | A landing pad can have live-in registers that are defined by the runtime, not the program (exception pointer register and exception selector register). Make sure to recognize that case and not link these registers with any defs in the program. Each landing pad will have phi nodes added at the beginning to provide definitions of these registers, but the uses of those phi nodes will not have any reaching defs. llvm-svn: 282519
* [RDF] Add initial support for lane masks in the DFGKrzysztof Parzyszek2016-09-221-32/+70
| | | | | | | Use lane masks for calculating covering and aliasing of register references. llvm-svn: 282194
* [RDF] Print the function name for calls in dumpsKrzysztof Parzyszek2016-09-221-3/+18
| | | | llvm-svn: 282191
* [RDF] Use uint32_t for register numbers instead of unsignedKrzysztof Parzyszek2016-09-221-7/+7
| | | | llvm-svn: 282190
* [RDF] Introduce "undef" flag for ref nodesKrzysztof Parzyszek2016-09-071-3/+28
| | | | llvm-svn: 280851
* [RDF] Ignore undef use operandsKrzysztof Parzyszek2016-09-061-1/+1
| | | | llvm-svn: 280717
* Use range algorithms instead of unpacking begin/endDavid Majnemer2016-08-111-1/+1
| | | | | | No functionality change is intended. llvm-svn: 278417
* [RDF] Make the graph construction/use less expensiveKrzysztof Parzyszek2016-07-221-6/+8
| | | | | | | | | - FuncNode::findBlock traverses the function every time. Avoid using it, and keep a cache of block addresses in DataFlowGraph instead. - The operator[] in the map of definition stacks was very slow. Replace the map with unordered_map. llvm-svn: 276429
* [hexagon] Move BlockRanges and RDF stuff into the llvm namespace.Benjamin Kramer2016-05-271-0/+2
| | | | | | No functional change intended. llvm-svn: 270980
* [scan-build] fix warnings emitted on LLVM Hexagon code baseKrzysztof Parzyszek2016-05-051-0/+1
| | | | | | | | Patch by Apelete Seketeli. Differential Revision: http://reviews.llvm.org/D19968 llvm-svn: 268691
* [RDF] Recognize tail calls in graph creationKrzysztof Parzyszek2016-04-281-4/+20
| | | | llvm-svn: 267939
* [RDF] Improve handling of inline-asmKrzysztof Parzyszek2016-04-281-4/+5
| | | | | | | - Keep implicit defs from inline-asm instructions. - Treat register references from inline-asm as fixed. llvm-svn: 267936
* [RDF] Add option to keep dead phi nodes in DFGKrzysztof Parzyszek2016-04-281-2/+3
| | | | | | | | | | Dead phi nodes are needed for code motion (such as copy propagation), where a new use would be placed in a location that would be dominated by a dead phi. Such a transformation is not legal for copy propagation, and the existence of the phi would prevent it, but if the phi is not there, it may appear to be valid. llvm-svn: 267932
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-2/+2
| | | | | | | | | | | | | Change TargetInstrInfo API to take `MachineInstr&` instead of `MachineInstr*` in the functions related to predicated instructions (I'll try to come back later and get some of the rest). All of these functions require non-null parameters already, so references are more clear. As a bonus, this happens to factor away a host of implicit iterator => pointer conversions. No functionality change intended. llvm-svn: 261605
* Fixed MSVC Win64 warning of implicit conversion of 32-bit shift to 64-bits.Simon Pilgrim2016-01-181-1/+1
| | | | llvm-svn: 258084
* [RDF] Allow unlinking ref nodes from data-flow chains onlyKrzysztof Parzyszek2016-01-181-10/+4
| | | | llvm-svn: 258073
* Fix compiler warnings from r257477Krzysztof Parzyszek2016-01-121-2/+2
| | | | llvm-svn: 257483
* Register Data Flow: data flow graphKrzysztof Parzyszek2016-01-121-0/+1716
Target independent, SSA-based data flow framework for representing data flow between physical registers. This commit implements the creation of the actual data flow graph. llvm-svn: 257477
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