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* [Hexagon] Improving error reporting for writing to read only registersKrzysztof Parzyszek2017-05-012-7/+22
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301828
* [Hexagon] Give better error messages for solo instruction errorsKrzysztof Parzyszek2017-05-012-7/+11
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301827
* [Hexagon] Improve shuffle error reportingKrzysztof Parzyszek2017-05-019-401/+272
| | | | | | Patch by Colin LeMahieu. llvm-svn: 301823
* This patch closes PR#32216: Better testing of schedule model instruction ↵Andrew V. Tischenko2017-04-142-2/+3
| | | | | | | | latencies/throughputs. The details are here: https://reviews.llvm.org/D30941 llvm-svn: 300311
* [Hexagon] Change the vector scaling for vector offsetsKrzysztof Parzyszek2017-04-062-48/+0
| | | | | | | Keep full offset value on MI-level instructions, but have it scaled down in the MC-level instructions. llvm-svn: 299664
* Add MCContext argument to MCAsmBackend::applyFixup for error reportingAlex Bradbury2017-04-051-1/+2
| | | | | | | | | | | | | | | | A number of backends (AArch64, MIPS, ARM) have been using MCContext::reportError to report issues such as out-of-range fixup values in their TgtAsmBackend. This is great, but because MCContext couldn't easily be threaded through to the adjustFixupValue helper function from its usual callsite (applyFixup), these backends ended up adding an MCContext* argument and adding another call to applyFixup to processFixupValue. Adding an MCContext parameter to applyFixup makes this unnecessary, and even better - applyFixup can take a reference to MCContext rather than a potentially null pointer. Differential Revision: https://reviews.llvm.org/D30264 llvm-svn: 299529
* [Hexagon] Remove unused variablesKrzysztof Parzyszek2017-03-311-11/+2
| | | | | | Found by PVS-Studio. Fixes llvm.org/PR31676. llvm-svn: 299262
* [Hexagon] Updating inline saturate lanes for v62 version.Colin LeMahieu2017-03-161-1/+4
| | | | llvm-svn: 297920
* [Hexagon] Add -mhvx option to the Hexagon backendKrzysztof Parzyszek2017-03-091-2/+8
| | | | llvm-svn: 297393
* Fix 'variable set but not used' warning when assertions are disabled.Simon Pilgrim2017-02-191-0/+2
| | | | llvm-svn: 295585
* Move symbols from the global namespace into (anonymous) namespaces. NFC.Benjamin Kramer2017-02-112-5/+3
| | | | llvm-svn: 294837
* [Hexagon] Introduce Hexagon V62Krzysztof Parzyszek2017-02-101-4/+11
| | | | llvm-svn: 294805
* [Hexagon] Replace instruction definitions with auto-generated onesKrzysztof Parzyszek2017-02-104-60/+22
| | | | llvm-svn: 294753
* [Hexagon] Update instruction typesKrzysztof Parzyszek2017-02-072-14/+27
| | | | | | | | | Remove TypeXTYPE, TypeALU32, TypeSYSTEM, TypeJR, and instead use their architecture counterparts. Patch by Colin LeMahieu. llvm-svn: 294321
* [Hexagon] Address ASAN and UBSAN failures after r294226Krzysztof Parzyszek2017-02-074-16/+18
| | | | | | Reinstate r294256 with a fix. llvm-svn: 294269
* Revert "[Hexagon] Address ASAN and UBSAN failures after r294226"Krzysztof Parzyszek2017-02-063-15/+13
| | | | | | | This reverts commit r294256. It seems to be causing more problems instead of solving them. llvm-svn: 294259
* [Hexagon] Address ASAN and UBSAN failures after r294226Krzysztof Parzyszek2017-02-063-13/+15
| | | | llvm-svn: 294256
* [Hexagon] Update MCTargetDescKrzysztof Parzyszek2017-02-0619-665/+1032
| | | | | | | | | | Changes include: - Updates to the instruction descriptor flags. - Improvements to the packet shuffler and checker. - Updates to the handling of certain relocations. - Better handling of duplex instructions. llvm-svn: 294226
* [Hexagon] Adding opExtentBits and opExtentAlign to GPrel instructionsKrzysztof Parzyszek2017-02-022-10/+36
| | | | | | Patch by Colin LeMahieu. llvm-svn: 293933
* [Hexagon] Fix relocation kind for extended predicated callsKrzysztof Parzyszek2017-02-021-5/+7
| | | | | | Patch by Sid Manning. llvm-svn: 293931
* [Hexagon] Remove A4_ext_* pseudo instructionsKrzysztof Parzyszek2017-02-024-29/+33
| | | | | | Patch by Colin LeMahieu. llvm-svn: 293929
* [Hexagon] Emitting individual instructions without copying themKrzysztof Parzyszek2017-02-022-97/+82
| | | | | | Patch by Colin LeMahieu. llvm-svn: 293899
* [Hexagon] Rename TypeCOMPOUND to TypeCJKrzysztof Parzyszek2017-02-024-6/+5
| | | | llvm-svn: 293894
* [Hexagon, TableGen] Fix some Clang-tidy modernize and Include What You Use ↵Eugene Zelenko2017-01-041-29/+16
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 290925
* [Hexagon] Other attempt to fix build with enabled asserts broken in 290024 ↵Eugene Zelenko2016-12-171-0/+1
| | | | | | (NFC). llvm-svn: 290028
* [Hexagon] Fix build with enabled asserts broken in 290024 (NFC).Eugene Zelenko2016-12-171-0/+1
| | | | llvm-svn: 290027
* [Hexagon] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2016-12-174-34/+52
| | | | | | other minor fixes (NFC). llvm-svn: 290024
* [Hexagon] Changing from literal numeric value to argument since #-1 will not ↵Colin LeMahieu2016-12-051-4/+2
| | | | | | parse when '-' is converted to a token. llvm-svn: 288634
* Check that emitted instructions meet their predicates on all targets except ↵Daniel Sanders2016-11-192-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM, Mips, and X86. Summary: * ARM is omitted from this patch because this check appears to expose bugs in this target. * Mips is omitted from this patch because this check either detects bugs or deliberate emission of instructions that don't satisfy their predicates. One deliberate use is the SYNC instruction where the version with an operand is correctly defined as requiring MIPS32 while the version without an operand is defined as an alias of 'SYNC 0' and requires MIPS2. * X86 is omitted from this patch because it doesn't use the tablegen-erated MCCodeEmitter infrastructure. Patches for ARM and Mips will follow. Depends on D25617 Reviewers: tstellarAMD, jmolloy Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits Differential Revision: https://reviews.llvm.org/D25618 llvm-svn: 287439
* Fix spelling mistakes in Hexagon target comments. NFC.Simon Pilgrim2016-11-172-3/+3
| | | | | | Identified by Pedro Giffuni in PR27636. llvm-svn: 287248
* Delete a dead store found by PVS-Studio.Chandler Carruth2016-11-031-1/+0
| | | | | | | | Quite sad we still aren't really using aggressive dead code warnings from Clang that we could potentially use to catch this and so many other things. llvm-svn: 285936
* Move the global variables representing each Target behind accessor functionMehdi Amini2016-10-092-11/+11
| | | | | | | | This avoids "static initialization order fiasco" Differential Revision: https://reviews.llvm.org/D25412 llvm-svn: 283702
* [Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this ↵Colin LeMahieu2016-10-084-4/+13
| | | | | | restriction rather than implying it from TypeJR. llvm-svn: 283665
* [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP.Colin LeMahieu2016-10-072-2/+2
| | | | llvm-svn: 283582
* [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names.Colin LeMahieu2016-10-072-158/+158
| | | | llvm-svn: 283514
* Use StringRef instead of raw pointers in MCAsmInfo/MCInstrInfo APIs (NFC)Mehdi Amini2016-10-012-2/+2
| | | | llvm-svn: 283018
* [Hexagon] Make p0 an explicit operand in VA1_clr* subinstructions, NFCKrzysztof Parzyszek2016-08-191-0/+5
| | | | llvm-svn: 279255
* [Hexagon] Rename the HEXAGON_MC namespace to Hexagon_MC, NFCKrzysztof Parzyszek2016-08-192-3/+3
| | | | llvm-svn: 279243
* [Hexagon] Mark PS_jumpret as pseudo-instruction, expand it into J2_jumprKrzysztof Parzyszek2016-08-191-16/+5
| | | | llvm-svn: 279241
* Replace "fallthrough" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-172-3/+3
| | | | | | | This is a mechanical change of comments in switches like fallthrough, fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead. llvm-svn: 278902
* [Hexagon] Standardize pseudo-instructions for calls and returnsKrzysztof Parzyszek2016-08-121-14/+14
| | | | | | | | | | | | | | | | | | | - CALLv3nr PS_call_nr - CALLRv3nr PS_callr_nr - CALLstk PS_call_stk - TCRETURNi PS_tailcall_i - TCRETURNr PS_tailcall_r - JMPret PS_jmpret - JMPrett PS_jmprett - JMPretf PS_jmpretf - JMPrettnew PS_jmprettnew - JMPretfnew PS_jmpretfnew - JMPrettnewpt PS_jmprettnewpt - JMPretfnewpt PS_jmpretfnewpt llvm-svn: 278499
* MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFCJoel Jones2016-07-252-2/+5
| | | | | | | | | | | | | | | Some targets, notably AArch64 for ILP32, have different relocation encodings based upon the ABI. This is an enabling change, so a future patch can use the ABIName from MCTargetOptions to chose which relocations to use. Tested using check-llvm. The corresponding change to clang is in: http://reviews.llvm.org/D16538 Patch by: Joel Jones Differential Revision: https://reviews.llvm.org/D16213 llvm-svn: 276654
* Fix branch relaxation in 16-bit mode.Nirav Dave2016-07-111-2/+2
| | | | | | | | | | | | | | | Thread through MCSubtargetInfo to relaxInstruction function allowing relaxation to generate jumps with 16-bit sized immediates in 16-bit mode. This fixes PR22097. Reviewers: dwmw2, tstellarAMD, craig.topper, jyknight Subscribers: jfb, arsenm, jyknight, llvm-commits, dsanders Differential Revision: http://reviews.llvm.org/D20830 llvm-svn: 275068
* [Hexagon] Create global std::map lazily.Benjamin Kramer2016-07-021-3/+3
| | | | | | | | This could of course be a simple binary search with no global state involved at all if someone cares enough. Just don't make everyone linking the hexagon backend pay for it on process startup and shutdown. llvm-svn: 274437
* Delete MCCodeGenInfo.Rafael Espindola2016-06-301-14/+0
| | | | | | | MC doesn't really care about CodeGen stuff, so this was just complicating target initialization. llvm-svn: 274258
* Prune some includes from headers and sink some inline functionsReid Kleckner2016-06-221-0/+1
| | | | | | | | MCSymbol.h shouldn't pull in MCAssembler.h, just MCFragment.h. MCLinkerOptimizationHint.h shouldn't need MCMachObjectWriter.h. The rest is fixing the fallout. llvm-svn: 273507
* Replace silly uses of 'signed' with 'int'David Majnemer2016-06-211-2/+2
| | | | llvm-svn: 273244
* [Hexagon] Separate C8 and USR to avoid unwanted subregister compositionKrzysztof Parzyszek2016-05-281-0/+5
| | | | | | | | Composing subreg_loreg with subreg_oveflow leads to strange results with lane masks for register classes with subreg_loreg. In particular, dead lane detection generates incorrect code. llvm-svn: 271087
* Fix -Wunused-variable in non-Asserts buildDavid Blaikie2016-05-191-2/+1
| | | | llvm-svn: 270118
* Simplify conditional unreachable into an assertionDavid Blaikie2016-05-191-7/+3
| | | | llvm-svn: 270111
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