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path: root/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
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* [Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction ↵Colin LeMahieu2015-11-091-137/+82
| | | | | | parsing tests. General updating of the code emission. llvm-svn: 252443
* [Hexagon] Adding skeleton of HVX extension instructions.Colin LeMahieu2015-10-171-0/+28
| | | | llvm-svn: 250600
* -Wdeprecated: Remove some dead code that was relying on a questionable ↵David Blaikie2015-08-051-41/+0
| | | | | | (rule-of-3-violating) copy ctor in MCInstPrinter llvm-svn: 244133
* MC: Add target hook to control symbol quotingMatt Arsenault2015-06-091-2/+2
| | | | llvm-svn: 239370
* [Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.Colin LeMahieu2015-06-051-1/+7
| | | | llvm-svn: 239161
* Revert r239095 incorrect test tree.Colin LeMahieu2015-06-041-7/+1
| | | | llvm-svn: 239102
* [Hexagon] Adding functionality for duplexing. Duplexing is a way to ↵Colin LeMahieu2015-06-041-1/+7
| | | | | | compress commonly used pairs of instructions in order to reduce code size. The test case duplex.ll normally would be 8 bytes, assign register to 0 and jump to link register. After duplexing this is only 4 bytes. This also tests the HexagonMCShuffler code path which is used to make sure duplexed instructions still follow slot requirements. llvm-svn: 239095
* [Hexagon] Disassembling, printing, and emitting instructions a whole-bundle ↵Colin LeMahieu2015-05-291-39/+69
| | | | | | at a time which is the semantic unit for Hexagon. Fixing tests to use the new format. Disabling tests in the direct object emission path for a followup patch. llvm-svn: 238556
* [Hexagon] Use constant extenders to fix up hardware loopsBrendon Cahoon2015-04-271-0/+14
| | | | | | | | | | Use a loop instruction with a constant extender for a hardware loop instruction that is too far away from the start of the loop. This is cheaper than changing the SA register value. Differential Revision: http://reviews.llvm.org/D9262 llvm-svn: 235882
* [Hexagon] Implement HexagonInstPrinter::printRegNameKrzysztof Parzyszek2015-04-221-5/+6
| | | | llvm-svn: 235514
* [MCInstPrinter] Enable MCInstPrinter to change its behavior based on theAkira Hatanaka2015-03-271-2/+3
| | | | | | | | | | | | | | | | | | | | per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. llvm-svn: 233411
* [Hexagon] Moving remaining methods off of HexagonMCInst in to ↵Colin LeMahieu2015-02-191-14/+9
| | | | | | HexagonMCInstrInfo and eliminating HexagonMCInst class. llvm-svn: 229914
* [Hexagon] [NFC] Renaming *packetStart to *packetBeginColin LeMahieu2014-12-031-3/+3
| | | | llvm-svn: 223243
* [Hexagon] Adding NOP encoding bits.Colin LeMahieu2014-11-251-1/+1
| | | | llvm-svn: 222791
* [Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they ↵Colin LeMahieu2014-11-201-0/+254
| | | | | | have a circular dependency. llvm-svn: 222458
* [Hexagon] Reverting 220584 to address ASAN errors.Colin LeMahieu2014-11-041-253/+0
| | | | llvm-svn: 221210
* [Hexagon] Resubmission of 220427Colin LeMahieu2014-10-241-0/+253
Modified library structure to deal with circular dependency between HexagonInstPrinter and HexagonMCInst. Adding encoding bits for add opcode. Adding llvm-mc tests. Removing unit tests. http://reviews.llvm.org/D5624 llvm-svn: 220584
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