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path: root/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp
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* [Hexagon] Separate Hexagon subreg indices for different register classesKrzysztof Parzyszek2016-11-091-2/+2
| | | | | | | | | | | For pairs of 32-bit registers: isub_lo, isub_hi. For pairs of vector registers: vsub_lo, vsub_hi. Add generic subreg indices: ps_sub_lo, ps_sub_hi, and a function HexagonRegisterInfo::getHexagonSubRegIndex(RegClass, GenericSubreg) that returns the appropriate subreg index for RegClass. llvm-svn: 286377
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* [Hexagon] Simplify the SplitConst32/64 passKrzysztof Parzyszek2016-08-101-65/+29
| | | | llvm-svn: 278256
* [Hexagon] Use integer instructions for floating point immediatesKrzysztof Parzyszek2016-08-101-26/+6
| | | | | | | | | | | | Floating point instructions use general purpose registers, so the few instructions that can put floating point immediates into registers are, in fact, integer instruction. Use them explicitly instead of having pseudo-instructions specifically for dealing with floating point values. Simplify the constant loading instructions (from sdata) to have only two: one for 32-bit values and one for 64-bit values: CONST32 and CONST64. llvm-svn: 278244
* Hexagon: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-121-25/+28
| | | | | | | | | | | | | | Avoid implicit iterator conversions from MachineInstrBundleIterator to MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr& over MachineInstr* and switching to range-based for loops. There's a long tail of API cleanup here, but I'm planning to leave the rest to the Hexagon maintainers. HexagonInstrInfo defines many of its own predicates, and most of them still take MachineInstr*. Some of those actually check for nullptr, so I didn't feel comfortable changing them to MachineInstr& en masse. llvm-svn: 275142
* [Hexagon] Expand handling of the small-data/bss sectionKrzysztof Parzyszek2016-04-211-1/+1
| | | | llvm-svn: 267034
* [NFC] Header cleanupMehdi Amini2016-04-181-4/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+4
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* Hexagon: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-201-1/+1
| | | | | | | | | | | | | | | | | | | There are two things out of the ordinary in this commit. First, I made a loop obviously "infinite" in HexagonInstrInfo.cpp. After checking if an instruction was at the beginning of a basic block (in which case, `break`), the loop decremented and checked the iterator for `nullptr` as the loop condition. This has never been possible (the prev pointers are always been circular, so even with the weird ilist/iplist implementation, this isn't been possible), so I removed the condition. Second, in HexagonAsmPrinter.cpp there was another case of comparing a `MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()` (which returns `MachineBasicBlock::iterator`). While not incorrect, it's fragile. I switched this to `::instr_end()`. All that said, no functionality change intended here. llvm-svn: 250778
* Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)Alexander Kornienko2015-06-231-1/+1
| | | | | | Apparently, the style needs to be agreed upon first. llvm-svn: 240390
* Fixed/added namespace ending comments using clang-tidy. NFCAlexander Kornienko2015-06-191-1/+1
| | | | | | | | | | | | | The patch is generated using this command: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py -fix \ -checks=-*,llvm-namespace-comment -header-filter='llvm/.*|clang/.*' \ llvm/lib/ Thanks to Eugene Kosov for the original patch! llvm-svn: 240137
* [Hexagon] Moving pass declarations out of header and in to implementation ↵Colin LeMahieu2015-06-151-0/+5
| | | | | | files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it. llvm-svn: 239744
* [Hexagon] Use A2_tfrsi for constant pool and jump table addressesKrzysztof Parzyszek2015-04-221-13/+2
| | | | llvm-svn: 235535
* [Hexagon] Removing old halfword codegen instructions and updating const32/64 ↵Colin LeMahieu2015-03-091-44/+41
| | | | | | splitting. llvm-svn: 231695
* [Hexagon] Factoring out a class for immediate transfers and cleaning up ↵Colin LeMahieu2015-02-051-2/+2
| | | | | | formatting. llvm-svn: 228343
* Migrate the HexagonSplitConst32AndConst64 pass from TargetMachineEric Christopher2015-02-021-12/+8
| | | | | | | based getSubtarget to the one cached on the MachineFunction. Remove unused class variables and update all callers/uses. llvm-svn: 227874
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-7/+8
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* Remove getTargetLowering from TargetPassConfig as the target loweringEric Christopher2014-05-211-1/+8
| | | | | | can change depending upon subtarget/subtarget features for a function. llvm-svn: 209329
* Remove unused member variable from hexagon pass.Eric Christopher2014-05-211-4/+3
| | | | llvm-svn: 209328
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-2/+2
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition llvm-svn: 207508
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-2/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-5/+5
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Remove use of forbidden 'iostream' header.Bill Wendling2013-08-211-13/+11
| | | | | | Also obsessively reorder the headers to be in something closer to alphabetical order. llvm-svn: 188928
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-071-0/+176
| | | | llvm-svn: 181344
* Reverting r181331.Jyotsna Verma2013-05-071-176/+0
| | | | | | Missing file, HexagonSplitConst32AndConst64.cpp, from lib/Target/Hexagon/CMakeLists.txt. llvm-svn: 181334
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-071-0/+176
llvm-svn: 181331
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