summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
Commit message (Collapse)AuthorAgeFilesLines
* [Hexagon] Update kills in hexagon-nvj even more properly than beforeKrzysztof Parzyszek2017-06-271-36/+27
| | | | | | | Account for the fact that both, the feeder and the compare can be moved over instructions that kill registers. llvm-svn: 306443
* [Hexagon] Properly update kill flags in HexagonNewValueJumpKrzysztof Parzyszek2017-06-221-1/+1
| | | | | | | The feeder instruction will be moved to right before the compare, so the updating code should not be looking for kills past the compare. llvm-svn: 306059
* [Hexagon] Avoid IMPLICIT_DEFs as new-value producersKrzysztof Parzyszek2017-02-231-0/+2
| | | | llvm-svn: 295997
* [Hexagon] Changing from literal numeric value to argument since #-1 will not ↵Colin LeMahieu2016-12-051-10/+0
| | | | | | parse when '-' is converted to a token. llvm-svn: 288634
* Use StringRef in Pass/PassManager APIs (NFC)Mehdi Amini2016-10-011-3/+1
| | | | llvm-svn: 283004
* MachineFunctionProperties/MIRParser: Rename AllVRegsAllocated->NoVRegs, ↵Matthias Braun2016-08-251-1/+1
| | | | | | | | | | | | | compute it Rename AllVRegsAllocated to NoVRegs. This avoids the connotation of running after register and simply describes that no vregs are used in a machine function. With that we can simply compute the property and do not need to dump/parse it in .mir files. Differential Revision: http://reviews.llvm.org/D23850 llvm-svn: 279698
* CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePassesMatthias Braun2016-08-241-1/+0
| | | | | | | | | | | | | | | | | | | | | | Re-apply this patch, hopefully I will get away without any warnings in the constructor now. This patch removes the MachineFunctionAnalysis. Instead we keep a map from IR Function to MachineFunction in the MachineModuleInfo. This allows the insertion of ModulePasses into the codegen pipeline without breaking it because the MachineFunctionAnalysis gets dropped before a module pass. Peak memory should stay unchanged without a ModulePass in the codegen pipeline: Previously the MachineFunction was freed at the end of a codegen function pipeline because the MachineFunctionAnalysis was dropped; With this patch the MachineFunction is freed after the AsmPrinter has finished. Differential Revision: http://reviews.llvm.org/D23736 llvm-svn: 279602
* Revert r279564. It introduces undefined behavior (binding a reference to aRichard Smith2016-08-231-0/+1
| | | | | | | dereferenced null pointer) in MachineModuleInfo::MachineModuleInfo that causes -Werror builds (including several buildbots) to fail. llvm-svn: 279580
* CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePassesMatthias Braun2016-08-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | Re-apply this commit with the deletion of a MachineFunction delegated to a separate pass to avoid use after free when doing this directly in AsmPrinter. This patch removes the MachineFunctionAnalysis. Instead we keep a map from IR Function to MachineFunction in the MachineModuleInfo. This allows the insertion of ModulePasses into the codegen pipeline without breaking it because the MachineFunctionAnalysis gets dropped before a module pass. Peak memory should stay unchanged without a ModulePass in the codegen pipeline: Previously the MachineFunction was freed at the end of a codegen function pipeline because the MachineFunctionAnalysis was dropped; With this patch the MachineFunction is freed after the AsmPrinter has finished. Differential Revision: http://reviews.llvm.org/D23736 llvm-svn: 279564
* Revert "(HEAD -> master, origin/master, origin/HEAD) CodeGen: Remove ↵Matthias Braun2016-08-231-0/+1
| | | | | | | | | | MachineFunctionAnalysis => Enable (Machine)ModulePasses" Reverting while tracking down a use after free. This reverts commit r279502. llvm-svn: 279503
* CodeGen: Remove MachineFunctionAnalysis => Enable (Machine)ModulePassesMatthias Braun2016-08-231-1/+0
| | | | | | | | | | | | | | | | | | | This patch removes the MachineFunctionAnalysis. Instead we keep a map from IR Function to MachineFunction in the MachineModuleInfo. This allows the insertion of ModulePasses into the codegen pipeline without breaking it because the MachineFunctionAnalysis gets dropped before a module pass. Peak memory should stay unchanged without a ModulePass in the codegen pipeline: Previously the MachineFunction was freed at the end of a codegen function pipeline because the MachineFunctionAnalysis was dropped; With this patch the MachineFunction is freed after the AsmPrinter has finished. Differential Revision: http://reviews.llvm.org/D23736 llvm-svn: 279502
* [Hexagon] Fixes for new-value jump formationKrzysztof Parzyszek2016-08-191-10/+31
| | | | | | | - Recognize C2_cmpgtui, S2_tstbit_i, and S4_ntstbit_i. - Avoid creating new-value instructions with both source operands equal. llvm-svn: 279286
* [Hexagon] Handle J2_jumptpt and J2_jumpfpt instructionsKrzysztof Parzyszek2016-08-191-0/+2
| | | | llvm-svn: 279246
* Hexagon: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-121-70/+66
| | | | | | | | | | | | | | Avoid implicit iterator conversions from MachineInstrBundleIterator to MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr& over MachineInstr* and switching to range-based for loops. There's a long tail of API cleanup here, but I'm planning to leave the rest to the Hexagon maintainers. HexagonInstrInfo defines many of its own predicates, and most of them still take MachineInstr*. Some of those actually check for nullptr, so I didn't feel comfortable changing them to MachineInstr& en masse. llvm-svn: 275142
* Add optimization bisect opt-in calls for Hexagon passesAndrew Kaylor2016-04-261-0/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D19509 llvm-svn: 267593
* [NFC] Header cleanupMehdi Amini2016-04-181-4/+1
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Add MachineFunctionProperty checks for AllVRegsAllocated for target passesDerek Schuff2016-04-041-0/+4
| | | | | | | | | | | | | | Summary: This adds the same checks that were added in r264593 to all target-specific passes that run after register allocation. Reviewers: qcolombet Subscribers: jyknight, dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D18525 llvm-svn: 265313
* CodeGen: TII: Take MachineInstr& in predicate API, NFCDuncan P. N. Exon Smith2016-02-231-1/+1
| | | | | | | | | | | | | Change TargetInstrInfo API to take `MachineInstr&` instead of `MachineInstr*` in the functions related to predicated instructions (I'll try to come back later and get some of the rest). All of these functions require non-null parameters already, so references are more clear. As a bonus, this happens to factor away a host of implicit iterator => pointer conversions. No functionality change intended. llvm-svn: 261605
* [Hexagon] Handle branches with non-mbb operandsKrzysztof Parzyszek2016-01-141-0/+2
| | | | llvm-svn: 257768
* [Hexagon] Add NewValueJump support for C4_cmpneq, C4_cmplte, C4_cmplteuRon Lieberman2015-12-081-0/+18
| | | | llvm-svn: 255027
* [Hexagon] Bring HexagonInstrInfo up to dateKrzysztof Parzyszek2015-11-241-6/+27
| | | | llvm-svn: 253986
* Hexagon: Remove implicit ilist iterator conversions, NFCDuncan P. N. Exon Smith2015-10-201-1/+1
| | | | | | | | | | | | | | | | | | | There are two things out of the ordinary in this commit. First, I made a loop obviously "infinite" in HexagonInstrInfo.cpp. After checking if an instruction was at the beginning of a basic block (in which case, `break`), the loop decremented and checked the iterator for `nullptr` as the loop condition. This has never been possible (the prev pointers are always been circular, so even with the weird ilist/iplist implementation, this isn't been possible), so I removed the condition. Second, in HexagonAsmPrinter.cpp there was another case of comparing a `MachineBasicBlock::instr_iterator` against `MachineBasicBlock::end()` (which returns `MachineBasicBlock::iterator`). While not incorrect, it's fragile. I switched this to `::instr_end()`. All that said, no functionality change intended here. llvm-svn: 250778
* [Hexagon] Moving pass declarations out of header and in to implementation ↵Colin LeMahieu2015-06-151-0/+1
| | | | | | files. Removing unused function getSubtargetInfo from HexagonMCCodeEmitter.cpp Removing deletion of copy construction and assignment operator since parent already deletes it. llvm-svn: 239744
* Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.Benjamin Kramer2015-03-231-0/+1
| | | | llvm-svn: 232998
* [Hexagon] Eliminating immediate condition set.Colin LeMahieu2015-03-091-2/+1
| | | | llvm-svn: 231693
* [Hexagon] Removing TFR_condset_ir/TFR_condset_ri modeling.Colin LeMahieu2015-03-091-2/+0
| | | | llvm-svn: 231689
* [Hexagon] Removing more V4 predicates since V4 is the required minimum.Colin LeMahieu2015-02-091-2/+1
| | | | llvm-svn: 228614
* [Hexagon] Renaming v4 compare-and-jump instructions.Colin LeMahieu2015-02-051-20/+20
| | | | llvm-svn: 228349
* Remove #if'd code and update comment.Eric Christopher2015-02-021-5/+2
| | | | llvm-svn: 227873
* [Hexagon] Adding J class call instructions.Colin LeMahieu2014-12-121-1/+1
| | | | llvm-svn: 224150
* [Hexagon] Adding encodings for JR class instructions. Updating complier usages.Colin LeMahieu2014-12-101-9/+9
| | | | llvm-svn: 223967
* [Hexagon] Adding cmp* immediate form instructions.Colin LeMahieu2014-11-261-7/+7
| | | | llvm-svn: 222849
* [Hexagon] Adding C2_mux instruction.Colin LeMahieu2014-11-251-2/+1
| | | | llvm-svn: 222784
* [Hexagon] Replacing cmp* instructions with ones that contain encoding bits.Colin LeMahieu2014-11-251-4/+4
| | | | llvm-svn: 222771
* Have MachineFunction cache a pointer to the subtarget to make lookupsEric Christopher2014-08-051-3/+2
| | | | | | | | | | | shorter/easier and have the DAG use that to do the same lookup. This can be used in the future for TargetMachine based caching lookups from the MachineFunction easily. Update the MIPS subtarget switching machinery to update this pointer at the same time it runs. llvm-svn: 214838
* Remove the TargetMachine forwards for TargetSubtargetInfo basedEric Christopher2014-08-041-3/+4
| | | | | | information and update all callers. No functional change. llvm-svn: 214781
* [C++11] Add 'override' keywords and remove 'virtual'. Additionally add ↵Craig Topper2014-04-291-3/+3
| | | | | | 'final' and leave 'virtual' on some methods that are marked virtual without overriding anything and have no obvious overrides themselves. Hexagon edition llvm-svn: 207508
* [C++] Use 'nullptr'. Target edition.Craig Topper2014-04-251-2/+2
| | | | llvm-svn: 207197
* [Modules] Fix potential ODR violations by sinking the DEBUG_TYPEChandler Carruth2014-04-221-1/+2
| | | | | | | definition below all of the header #include lines, lib/Target/... edition. llvm-svn: 206842
* Re-sort all of the includes with ./utils/sort_includes.py so thatChandler Carruth2014-01-071-17/+15
| | | | | | | | | | subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. llvm-svn: 198685
* Suppress GCC compiler warnings in release builds about variables that are onlyDuncan Sands2013-05-131-0/+1
| | | | | | read in asserts. llvm-svn: 181689
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-061-33/+54
| | | | llvm-svn: 181235
* reverting r180953Jyotsna Verma2013-05-021-54/+33
| | | | llvm-svn: 180964
* Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma2013-05-021-33/+54
| | | | llvm-svn: 180953
* Hexagon: Honor __builtin_expect by using branch probabilities.Jyotsna Verma2013-05-021-13/+34
| | | | | | | | | | | | | * lib/Target/Hexagon/HexagonInstrInfo.cpp (GetDotNewPredOp): Given a jump opcode return the right pred.new jump opcode with a taken vs not-taken hint based on branch probabilities provided by the target independent module. * lib/Target/Hexagon/HexagonVLIWPacketizer.cpp: Use the above function. * lib/Target/Hexagon/HexagonNewValueJump.cpp(getNewvalueJumpOpcode): Enhance existing function use branch probabilities like HexagonInstrInfo::GetDotNewPredOp but for New Value (GPR) Jumps. llvm-svn: 180923
* Hexagon: Use multiclass for Jump instructions.Jyotsna Verma2013-05-011-9/+9
| | | | llvm-svn: 180885
* Hexagon: Remove assembler mapped instruction definitions.Jyotsna Verma2013-04-231-47/+16
| | | | llvm-svn: 180133
* There is no longer any need to silence this compiler warning as the warning hasDuncan Sands2013-03-311-1/+1
| | | | | | been turned off globally. llvm-svn: 178451
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-18/+16
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* Add a getName function to MachineFunction. Use it in places that previously ↵Craig Topper2012-08-221-1/+1
| | | | | | did getFunction()->getName(). Remove includes of Function.h that are no longer needed. llvm-svn: 162347
OpenPOWER on IntegriCloud