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path: root/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
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* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-251-1/+7
| | | | | | | Allow the strategy to select SchedDFS. Allow the results of SchedDFS to affect initialization of the scheduler state. llvm-svn: 173425
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-031-1/+0
| | | | | | | | | | | | | | | | | Sooooo many of these had incorrect or strange main module includes. I have manually inspected all of these, and fixed the main module include to be the nearest plausible thing I could find. If you own or care about any of these source files, I encourage you to take some time and check that these edits were sensible. I can't have broken anything (I strictly added headers, and reordered them, never removed), but they may not be the headers you'd really like to identify as containing the API being implemented. Many forward declarations and missing includes were added to a header files to allow them to parse cleanly when included first. The main module rule does in fact have its merits. =] llvm-svn: 169131
* ScheduleDAG interface. Added OrderKind to distinguish nonregister dependencies.Andrew Trick2012-11-061-2/+1
| | | | | | | This is in preparation for adding "weak" DAG edges, but generally simplifies the design. llvm-svn: 167435
* misched: Use the TargetSchedModel interface wherever possible.Andrew Trick2012-10-101-10/+13
| | | | | | | | Allows the new machine model to be used for NumMicroOps and OutputLatency. Allows the HazardRecognizer to be disabled along with itineraries. llvm-svn: 165603
* DAG post-process for Hexagon MI schedulerSergei Larin2012-09-141-0/+27
| | | | | | | | This patch introduces a possibility for Hexagon MI scheduler to perform some target specific post- processing on the scheduling DAG prior to scheduling. llvm-svn: 163903
* Remove redundant private field.Benjamin Kramer2012-09-141-1/+1
| | | | | | clang warned about this being unused in Release builds. llvm-svn: 163899
* Reorganize MachineScheduler interfaces and publish them in the header.Andrew Trick2012-09-111-312/+12
| | | | | | | | | | | | | | The Hexagon target decided to use a lot of functionality from the target-independent scheduler. That's fine, and other targets should be able to do the same. This reorg and API update makes that easy. For the record, ScheduleDAGMI was not meant to be subclassed. Instead, new scheduling algorithms should be able to implement MachineSchedStrategy and be done. But if need be, it's nice to be able to extend ScheduleDAGMI, so I also made that easier. The target scheduler is somewhat more apt to break that way though. llvm-svn: 163580
* Add "blocked" heuristic to the Hexagon MI scheduler.Sergei Larin2012-09-101-36/+114
| | | | | | Improve AQ instruction selection in the Hexagon MI scheduler. llvm-svn: 163523
* Porting Hexagon MI Scheduler to the new API.Sergei Larin2012-09-041-0/+874
Change current Hexagon MI scheduler to use new converging scheduler. Integrates DFA resource model into it. llvm-svn: 163137
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